Power noise rejection and device noise analysis at the reference level of ramp ADC

Peter Ahn; JiYong Um; EunJung Choi; HyunMook Park; JaSeung Gou; KwangJun Cho; KangBong Seo; SangDong Yoo

doi:10.1117/12.2083099

13 March 2015 Power noise rejection and device noise analysis at the reference level of ramp ADC

Peter Ahn, JiYong Um, EunJung Choi, HyunMook Park, JaSeung Gou, KwangJun Cho, KangBong Seo, SangDong Yoo

Proceedings Volume 9403, Image Sensors and Imaging Systems 2015; 94030M (2015) https://doi.org/10.1117/12.2083099
Event: SPIE/IS&T Electronic Imaging, 2015, San Francisco, California, United States

Abstract

Sources of noise that corrupt the reference level VREF during a ramp ADC operation are identified and analyzed. For power noise analysis, PSR of bandgap reference and current generator are investigated through small signal circuits. For device noise appearing at the reference level, noise contribution from each device is expressed in terms of design variables. The identified design variables are arranged in a table to serve as a guide for low noise CMOS imager design.

Citation Download Citation

Peter Ahn, JiYong Um, EunJung Choi, HyunMook Park, JaSeung Gou, KwangJun Cho, KangBong Seo, and SangDong Yoo "Power noise rejection and device noise analysis at the reference level of ramp ADC", Proc. SPIE 9403, Image Sensors and Imaging Systems 2015, 94030M (13 March 2015); https://doi.org/10.1117/12.2083099

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