We present an evaluation of an on-chip charge detector, called the single electron sensitive read out (SiSeRO), for charge-coupled device image sensor applications. It uses a p-channel metal-oxide-semiconductor field-effect transistor (p-MOSFET) transistor at the output stage with a depleted internal gate beneath the p-MOSFET. Charge transferred to the internal gate modulates the source-drain current of the transistor. We have developed a drain current readout module to characterize the detector. The prototype sensor achieves a charge/current conversion gain of 700 pA per electron, an equivalent noise charge (ENC) of 15 electrons (e⁻) root mean square, and a full width half maximum of 230 eV at 5.9 keV. Further, we discuss the SiSeRO working principle, the readout module developed at Stanford, and the first characterization test results of the SiSeRO prototypes. While at present only a proof-of-concept experiment, in the near future we plan to use next generation sensors with improved noise performance and an enhanced readout module. In particular, we are developing a readout module enabling repetitive non-destructive readout of the charge, which can in principle yield subelectron ENC performance. With these developments, we eventually plan to build a matrix of SiSeRO amplifiers to develop an active pixel sensor with an on-chip application specific integrated circuit-based readout system. Such a system, with fast readout speeds and subelectron noise, could be effectively utilized in scientific applications requiring fast and low-noise spectro-imagers.