Fab metrology and defect inspection workflows have reached an inflection point with the introduction of gate-all-around (GAA) and high aspect ratio memory structures. Few existing inspection and metrology tools can match the sub-surface imaging and analytical capability provided by (Scanning) Transmission Electron Microscopy ((S)TEM). Fully automated (S)TEM workflows are becoming a necessity for the industry to deliver high volume metrology reference data. This atomic scale data must be available with fast turnaround and must also be statistically valid to speed up learning cycles. In this study, we present (S)TEM metrology characterization of advanced GAA and 3D NAND devices by an automated MetriosTM TEM. We introduce an internal machine learning-based modeling algorithm to address the challenges of recognizing GAA devices with process variations and provide faster access to highly accurate TEM reference metrology data. We present automated EDS characterization of beam-sensitive ONO layers, which is a key challenge in 3D NAND device metrology, enabled by a new generation of EDS detector with a high collection efficiency. We also present results on (S)TEM metrology during process monitoring of GAA devices with a higher level of TEM automation.
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