This work proposes the design of optical SR latch. The fundamental component of the latch is a micro-ring resonator (MRR), which utilizes a plasma dispersion effect with an applied reverse bias voltage to tune its resonance wavelength. The proposed SR latch is made up of two identical micro-ring resonators with similar doped regions and the same logic mode of operation. The memory properties are realized by implementing the feedback loop between the input and output of the circuit. A time-varying simulation is carried out by applying two pseudorandom electrical input signals S and R into the circuit at a data rate of 25 Gbps. The work concludes with a comparative analysis between two optical SR latches (NOR-based and NAND-based).
This paper proposes the design an all-optical 1-bit digital comparator. The comparator structure consists of micro-ring resonators (MRR) paired with a constant light source (COS). MRRs in the comparator design are utilized as modulators by tuning their resonant wavelengths. In this way, under no external disturbances, the rings are uncoupled by default. The proposed 1-bit digital comparator is CMOS-compatible meaning that it can be fabricated using the existing technologies. Also, to reduce the fabrication complexity of the proposed device, thermo-optic modulation is employed as the primary light modulating technique. The 1-bit digital comparator is tested at 0.5 Mbps. The study concludes with suggestions on design improvements and potential application in photonic computing.
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