Immersion technology is definitely the mainstream lithography technology for NAND FLASH in recent years since
hyper-NA immersion technology drives the resolution limit down to the 40-50 nm half pitch region. Immersion
defectivity and overlay issues are key challenges before introducing immersion technology into mass production. In this
work, both long term immersion defectivity and overlay data, as well as good photoresist performance, show the Nikon
S610C immersion scanner plus LITHIUS i+ cluster is capable of 40-50 nm NAND FLASH mass production. Immersion
defects are classified based on their causes, and no tool specific immersion defects, e.g. bubbles and water marks, were
found in the Nikon S610C plus TEL LITHIUS i+ cluster. Materials-induced immersion defects require more attention to
achieve production-worthy results.
As the semiconductor industry continues to drive towards high volume production at the 50nm technology node and
beyond, there are formidable barriers imposed not only from technical challenges but also from economic challenges
related to controlling overlay tightly enough to meet the strict requirements of a increasingly smaller overlay control
window. In this paper, the authors will show potential sources overlay error for a 50nm node process and detail a
methodology to pinpoint the root cause and an application to help reduce these errors to facilitate the ramp of a new
process technology for high volume DRAM/FLASH manufacturing. In short, based on a series of experiments and
analysis, the authors have identified high-order wafer-level residual component to be the main contribution of the high
residuals with the source attributed to the scanner mix-and-match set. In turn, an overlay control approach using high
order correctables generated from the overlay metrology system and fed through the APC system will be able to
effectively reduce the mix-and-match high residual errors.
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