Prof. Le Yang Profile

Prof. Le Yang

at Skyverse Ltd

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Proceedings Article | 20 March 2020 Paper

VIA dishing metrology for novel 3D NAND using neural network assisted white light interferometry

Sicong Wang, Xiaoye Ding, Yi Zhou, Yanzhong Ma, Le Yang, Chi Chen, Lu Chen

Proceedings Volume 11325, 113250B (2020) https://doi.org/10.1117/12.2550947

KEYWORDS: Metrology, Atomic force microscopy, Neural networks, Image processing, Semiconducting wafers, 3D metrology, Optical interferometry

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In traditional 3D NAND design, peripheral circuit accounts for 20-30% of the chip real-estate, which reduces the memory density of flash memory. As 3D NAND technology stacks to 128 layers or higher, peripheral circuits may account for more than 50% of the overall chip area. On the contrast, the Xtacking^TM technology arranges array and logic parts on two different wafers, and connects the memory arrays to the logic circuit by metal VIAs (Vertical Interconnect Accesses) to achieve unprecedented high storage density as well as DRAM level I/O speed. As a consequence, it becomes increasingly significant to monitor metal VIAs depth before wafer bonding process as to ensure reliability of array-logic connections. Currently, AFM (Atom Force Microscopy) is the main stream method of VIA depth monitoring. Apparently, AFM wins the battle of precision, however the low throughput limited its usage in mass production. In order to accomplish the requirement of VLSI production, a WLI (White Light Interferometry) metrology is revisited and a novel neural network assisted method was developed to monitor VIA depth. Basically, there are two major limitations that keep WLI tools from wider use, transparent film impact and diffraction limitation. In this work, realization of neural network is illustrated and inline dishing measurement is achieved with high accuracy and precision.

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