An optimum design of the LOFIC CMOS image sensor for high sensitivity, low noise, and high full well capacity

Nana Akahane; Woonghee Lee; Shigetoshi Sugawa

doi:10.1117/12.765649

21 February 2008 An optimum design of the LOFIC CMOS image sensor for high sensitivity, low noise, and high full well capacity

Nana Akahane, Woonghee Lee, Shigetoshi Sugawa

Author Affiliations +

Proceedings Volume 6817, Digital Photography IV; 681702 (2008) https://doi.org/10.1117/12.765649
Event: Electronic Imaging, 2008, San Jose, California, United States

Abstract

It is indispensable for high quality image sensors to have performances of high sensitivity, low noise, high full well capacity and good linear response. The CMOS image sensor with the lateral overflow integration capacitor (LOFIC) has been accomplishing these performances because of its wide dynamic range capability in one exposure. Recently, we have improved the SNR of the LOFIC CMOS image sensor and achieved the number of input-referred noise electrons of 2 e- or below without any column amplifier circuits by increasing the photo-electric conversion gain at the floating diffusion (FD) in pixel as keeping low dark current, good uniformity and high well capacity. It is clear that the relation among the conversion gain, the SNR and the full well capacity decides the optimum design for the FD capacitance and the LOFIC to realize a high quality image sensor. In this paper, the optimum design method of the LOFIC CMOS image sensor for high sensitivity, low noise and high full well capacity is discussed through theoretical analysis and experiments by using the fabricated LOFIC CMOS image sensor.

Citation Download Citation

Nana Akahane, Woonghee Lee, and Shigetoshi Sugawa "An optimum design of the LOFIC CMOS image sensor for high sensitivity, low noise, and high full well capacity", Proc. SPIE 6817, Digital Photography IV, 681702 (21 February 2008); https://doi.org/10.1117/12.765649

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