Editor-in-Chief Harry Levinson writes about the importance of connections between academia and industry.

JM3 Associate Editor Qinghuang Lin interviews Wen-li Wu, retired from the National Institute of Standards and Technology. With R. Joseph Kline, Ronald L. Jones, Hae-Jeong Lee, Eric K. Lin, Daniel F. Sunday, Chengqing Wang, Tengjiao Hu, and Christopher L. Soles, Wu is the lead author of “ Review of the key milestones in the development of critical dimension small angle x-ray scattering at National Institute of Standards and Technology,” a review paper in the Special Section on 3D Metrology in the July–September 2023 issue of the Journal of Micro/Nanopatterning, Materials, and Metrology.

Guest editors Ndubuisi George Orji and Qinghuang Lin introduce the Special Section on 3D Semiconductor Metrology.

A spectral interferometry technique called vertical travelling scatterometry (VTS) is introduced, demonstrated, and discussed. VTS utilizes unique information from spectral interferometry and enables solutions for applications that are infeasible with traditional scatterometry approaches. The technique allows for data filtering related to spectral information from buried layers, which can then be ignored in the optical model. Therefore, using VTS, selective analyses of the topmost part of an arbitrarily complex stack are possible within a single metrology step. This methodology helps to overcome geometrical complexities and allows for focusing on parameters of interest through dramatically simplified optical modeling. Such model simplifications are specifically desired for back-end-of-line applications. Three examples are monitored discussed: (i) the critical dimensions (CDs) of a first metal level on top of nanosheet gate-all-around transistor structures, (ii) the thickness of an interlayer dielectric above embedded memory in the active area, and (iii) the CDs of trenches on top of tall stacks in the micrometer range comprising many layered dielectrics. It was found that, in all three cases, data filtering through VTS allowed for a simple optical model capable of delivering parameters of interest. The validity and accuracy of the VTS solution results were confirmed by extensive reference metrology obtained by traditional scatterometry, scanning electron microscopy, and transmission electron microscopy. Furthermore, it was shown that machine learning models trained with VTS filtered data can converge to a robust solution with a smaller dataset compared with models training with traditional scatterometry data.

Nanoelectronics is changing the world with the technology that enables global progress and enriches people’s lives. Continuing Moore’s law propels the research and the development of devices with better functionality and performance while controlling power, cost, and size. As the architectural complexity increases and functional nanomaterials advance into nano- and even atomic-scale regimes, three-dimensional (3D) metrologies become essential in validating the structure and chemistry of materials that govern the device properties. We cover recent advances of 3D metrologies in semiconductor industry research and development. It addresses the techniques from the device level, such as transmission electron microscopy and atom probe tomography to array level, such as compositional microscope and nondestructive optical-based metrologies, including 3D structural, 3D compositional analysis, and 3D property characterization.

High aspect ratio (HAR) structures found in three-dimensional nand memory structures have unique process control challenges. The etch used to fabricate channel holes several microns deep with aspect ratios beyond 50:1 is a particularly challenging process that requires exquisitely accurate and precise control. It is critical to carefully analyze multiple aspects of the etch process, such as hole profile, tilt, uniformity, and quality during development and production. X-ray critical dimension (XCD) metrology, which is also known as critical dimension small-angle x-ray scattering, is a powerful technique that can provide valuable insights on the arrangement, shape, and size of periodic arrays of HAR features. XCD is capable of fast, non-destructive measurements in the cell-area of production wafers, making XCD ideal for in-line metrology. Through several case studies, we will show that XCD can be used to accurately and precisely determine key properties of holes etched into hard mask, multilayer oxide/nitride film stacks and slit trenches. We show that the measurement of hole and slit tilt can be achieved without the aid of a structural model using a Fast Tilt methodology that provides sub-nanometer precision. Measurements were performed across several production wafers to determine the etch uniformity and quality. Particular attention was given at the edge of the wafers to account for large variations observed. In addition, we used a detailed physical model to characterize the HAR structures beyond linear tilt. This approach provides a more complete picture of the etch quality.

An x-ray scattering based metrology was conceived over 20 years ago as part of a collaboration between National Institute of Standards and Technology (NIST) and International Business Machines Corporation (IBM) to evaluate the performance of lithographic patterning materials for the semiconductor industry. This methodology treated a periodic array of lithographic structures as a diffraction grating and focused on extracting the physical dimensions of the structures in the grating by analyzing the diffraction patterns. In the early stages of the work the focus was on developing the transmission small-angle x-ray scattering (tSAXS) as a metrology tool to measure the critical dimensions (CD) of the lithographic features vital to the integrated circuit chip fabrication. Later, the focus shifted to include grazing incident small-angle x-ray scattering and x-ray reflectivity as parts of the CD metrology tool due to their unique capabilities. Frequently the term critical dimension small-angle x-ray scattering (CDSAXS) has been used as a synonym for the metrology of using tSAXS for CD measurements without mentioning transmission. Various milestones in the CDSAXS development are reviewed in this article together with some prospects regarding the future growth of x-ray-based metrology for complex three-dimensional nanostructures important to semiconductor industries.

Memory hole (MH) etching may be one of the most critical and challenging processes in three-dimensional flash processing and integration. As the holes get deep, hole critical dimensions (CDs) can vary significantly during the top-down etch processing, the hole shape can deviate from a round hole, and the centerline of the hole can deviate from a vertical line. These and other complex behaviors depend on not only the process conditions (chemistry, plasma power, bias, temperature, etc.) but also the process chamber history [e.g., radio frequency (RF) hours from preventative maintenance] and how the process chambers are conditioned. In addition, the etch behavior depends on the tier thickness (ONON or OPOP), materials, deposition conditions, and overall wafer topography and shapes. The etch behavior is further related to the die positions on the wafer (center or middle versus edge dies) and the position in the memory cell (close to the edge of the cell or near the center of the cell). To monitor and control the etch behavior, many metrology methods have been developed; these include the etch-back top-view scanning electron microscopy (SEM), tilt SEM, transmission electron microscopy (TEM), and high voltage scanning electron microscopy (HVSEM). These methods are time consuming, and some are destructive, but they have been deemed the ground truth for determining variations in MH etch processes. We report a methodology that combines optical scatterometry (SCD) and small-angle x-ray scatterometry measurements to provide reliable CD profile measurements while meeting the fast-turnaround sampling requirements of high-volume manufacturing.

Accurate metrology techniques for semiconductor devices are indispensable for controlling the manufacturing process. For instance, the dimensions of a transistor’s current channel (fin) are an important indicator of the device’s performance regarding switching voltages and parasitic capacities. We expand upon traditional 2D analysis by utilizing computer vision techniques for full-surface reconstruction. We propose a data-driven approach that predicts the dimensions, height and width (CD) values, of fin-like structures. During operation, the method solely requires experimental images from a scanning electron microscope of the patterns concerned. We introduce an unsupervised domain adaptation step to overcome the domain gap between experimental and simulated data. Our model is further fine-tuned with a height measurement from a second scatterometry sensor and optimized through a tailored training scheme for optimal performance. The proposed method results in accurate depth predictions, namely 100% accurate interwafer classification with an root-mean-squared error of 0.67 nm. The R² of the intrawafer performance on height is between 0.59 and 0.70. Qualitative results also indicate that detailed surface features, such as corners, are accurately predicted. Our study shows that accurate z-metrology techniques can be viable for high-volume manufacturing.

Semiconductor logic and memory technology development continues to push the limits of process complexity and cost, especially as the industry migrates to the 5 nm node and beyond. Optimization of the process flow and ultimately quantifying its physical and electrical properties are critical steps in yielding mature technology. The standard build, test, and wait model of technology development is a major contributor to time and cost overruns. The growing inability to characterize many of the subtle and complicated features and yield limiting factors of a given technology is another serious constraint. We demonstrate the use of process modeling, virtual wafer fabrication, and virtual metrology in process development of advanced logic and memory. Accurate and predictive process modeling, in combination with virtual metrology enables the characterization of any feature on any given structure, is becoming a key requirement in advanced technology development. Virtual fabrication also accelerates the semiconductor development cycle, by substituting limited and lengthy wafer-based experiments with fast, large-scale virtual design of experiment. Several applications of virtual process modeling and metrology are illustrated in 3D NAND, DRAM, and logic technology. These applications include studies of 3D NAND pillar etch alignment (including tilt, twist, and bowing), DRAM capacitor process window optimization, advanced FinFET logic pitch-walking, and BEOL performance optimization.

We present a reconstruction of the in-depth profile of line gratings using critical-dimension grazing incidence small angle x-ray scattering with a compact Cu-Kα x-ray source mounted on a laboratory small angle x-ray scattering (SAXS). By taking advantage of the grazing-incidence configuration and with a rotation of the gratings under the x-ray beam, several orders of the Bragg rods were probed and led to the extraction of the in-depth profile of the lines. The extracted in-depth profile is compared with 3D atomic force microscopy results. The methodology developed mimics the one of critical dimension SAXS measurements, in transmission, to enable future comparison between the two approaches as well as building complementary modeling. These results open new perspectives for in-line x-ray metrology since the Cu-Kα x-ray source is widely spread and used by the x-ray community.

The processing of gate-all-around (GAA) Si transistors requires several isolated and vertically stacked nanometer-thick Si sheets or wires. For this purpose, the sacrificial SiGe layers of a SiGe/Si superlattice are etched selectively and laterally. Controlling the quantity of etched SiGe material, i.e., the so-called SiGe cavity depth, is critical for optimal device performance. Unfortunately, this critical dimension can only be measured by time-consuming cross-sectional transmission electron microscopy (TEM), which results in limited statistics and hence insufficient control of the cavity depth across wafers and batches. This paper evaluates the capabilities of micro hard x-ray fluorescence (μHXRF) for the determination of cavity depth as a fast and non-destructive alternative to TEM. As we show, μHXRF provides cavity depth values in excellent agreement with TEM. In addition, two critical advantages of the technique demonstrated here are that, thanks to the very high energy of the incoming and emitted X-rays, the SiGe volume is extracted without requiring any complex model and without any correlation to other geometrical parameters of the complex GAA device.