KEYWORDS: Semiconductor manufacturing, Inspection, Image classification, Scanning electron microscopy, Deep learning, Semiconductors, Classification systems
The semiconductor manufacturing process is becoming more complex and time-consuming due to smaller design rules and denser patterns, which inevitably leads to an increase in the number and types of defects. In the past, considerable efforts have been made to classify defects, and this has been implemented at the equipment level. However, in order to enhance the efficiency and productivity of semiconductor process development by automatically classifying random, systematic, and parametric defects according to various process schemes and structures, there is a need for a deep learning-based automatic defect classification technique with a higher degree of freedom and utilization. In this study, we used not only scanning electron microscope images, which have been actively studied, but also optical inspection images at various scales. Deep learning algorithms were evaluated for various layers of memory devices to select the optimal algorithm for each layer, and an accuracy of 94% or more was achieved, even with a small sample size (under 1000), which is critical in the R&D stage. It is expected that this technique will be able to spread and be applied to more diverse layers in the future. By providing faster and more diverse classifications of defects in semiconductor manufacturing processes and ensuring higher consistency through continuous sample size expansion, it is anticipated that this technique will contribute to shortening the development period and improving yield.
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