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This paper focuses on MCT heterostructure developments and novel design elements in silicon read-out chips (ROICs). The 2048 x 2048 element, 17um pitch ROIC for ESA’s SWIR array development forms the basis for the largest cooled infrared detector manufactured in Europe. Selex ES MCT is grown by metal organic vapour phase epitaxy (MOVPE), currently on 75mm diameter GaAs substrates. The MCT die size of the SWIR array is 35mm square and only a single array can be printed on the 75mm diameter wafer, utilising only 28% of the wafer area. The situation for 100mm substrates is little better, allowing only 2 arrays and 31% utilisation. However, low cost GaAs substrates are readily available in 150mm diameter and the MCT growth is scalable to this size, offering the real possibility of 6 arrays per wafer with 42% utilisation.
A similar 2k x 2k ROIC is the goal of ESA’s NIR programme, which is currently in phase 2 with a 1k x 1k demonstrator, and a smaller 320 x 256 ROIC (SAPHIRA) has been designed for ESO for the adaptive optics application in the VLT Gravity instrument. All 3 chips have low noise source-follower architecture and are enabled for MCT APD arrays, which have been demonstrated by ESO to be capable of single photon detection. The possibility therefore exists in the near future of demonstrating a photon counting, 2k x 2k SWIR MCT detector manufactured on an affordable wafer scale of 6 arrays per wafer.
Progress on the characterization activities of new infrared detectors from Leonardo, UK at the UKATC
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