KEYWORDS: Etching, System on a chip, Image processing, Sensors, Lithography, Semiconducting wafers, Distance measurement, Process control, Transistors, Signal to noise ratio
BackgroundThe self-aligned double-patterning (SADP) process is being used extensively to overcome the lithographic resolution limit in the manufacture of integrated circuits. One use case is fin definition in a fin field-effect transistor. Fin cut layers are applied to modify the fins to the requirements of the device designs.AimThe traditional secondary electron (SE) imaging exhibits a disadvantage in the process controlling the fin cut layers, and fin damage defects were observed. This work aims to improve the monitoring and controlling capabilities for the process quality of fin cut layers.ApproachA specially designed fin cut process flow and a backscattered electron (BSE) imaging technique are applied to check the process quality. The patterns formed through the fin cut etch and the fin structures are identified and measured simultaneously in one BSE image.ResultsBy measuring the edge-to-edge distance, pitch walking (PW) of fins, and overlay (OV), the root cause of the fin damage is revealed. The linear fitting model and third-order fitting model are applied to reduce the edge placement error (EPE). The edge distance protecting the “at risk” fin is enlarged from 5.6 to 11.6 nm. The range of the distance is reduced from 11.6 to 8.1 nm, and the improvement in standard deviation is about 33%.ConclusionsThis work shows the capability of the BSE imaging technique in the characterization of fin cut layers and the potential in process window improvement restricted to fin damage defects.
This Conference Presentation, “A holistic study of edge placement error on fin cut layer in self-aligned double patterning process,” was recorded at SPIE Photonics West held in San Francisco, California, United States.
As technology progress with scaling to meet the market requirements, the patterning characterization of dense features suffers a significant challenge for current optic tools, and measurement accuracy will be an important index and great challenge as well. Patterning can mostly be characterized with index of overlay (OVL) and CDU (critical dimension uniformity) measurement. When you break down the budget of the overlay error, one of the challenges is a gap of measurement results between scribe and device, where provides improper information to be used in overlay correction and causes process anomaly (excursion) detection, resulting in a low yield at the end of the production process. An eBeam tool, using high electron landing energies while utilizing the ElluminatorTM technology[1] for improvement backscattered electrons (BSE) imaging efficiency, can be utilized to directly capture OVL performance of device unit in-die, including local and global level, due to BSE function of eBeam tool[2]. In this paper, we demonstrate overlay measurement of M0 to Poly line in device for advanced logic node (only OVL X measurement), obtaining Overlay gap between in-die and scribe line to capture the actual behavior of device unit in-die. Massive OVL data is measured using eBeam tool with fast speed and high resolution, and local OVL results have been analyzed in detail. We’ve quantified what is the impact of overlay correction by different measurement ways whether it depends on optical tool or eBeam tool and benefits yield improvement.
Stochastic effects in EUV patterning refer to random variations that impact local pattern edge fidelity. It can be caused by the lithography or etch processes. Distorted edge placement can result in larger pattern edge roughness, distorted pattern shape for contract holes, poor CD uniformity, and in more severe cases, partially or fully closed contacts. Large statistical SEM metrology can be used to quantify the severity of distortion and failure probability by measuring line edge roughness (LER) and line width roughness (LWR) [3].
The attempt to differentiate between normal global uniformity and local uniformity pose a metrology challenge. In this paper, we present a scanning electron microscopy (SEM) based method for detecting stochastic defects. The detected defects are reviewed by metrology and classified by defect margin merit. The proposed merit converts geometrical attributes into statistical attributes which identify whether a pattern is statistically normal or a statistical outlier.
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