Integrated photonics offer a miniaturization potential for applications like sensing, data communication, as well as emerging quantum technologies. In this paper we show optical loss measurements for different e-beam approximation, data preparation, and exposure strategies concerning optical waveguides. The focus is on both, the decrease of e-beam writing time and the reduction of optical loss, which is achieved by applying Vistec’s shot count optimized and edge roughness aware JES Approximation, as compared to the common Border Approximation.
Photonics applications generate more and more interest and they are on the way from research to commercially available products. However, due to versatility and the currently related manufacturing volume of the potential applications, efficient patterning techniques are required. Vistec’s electron-beam lithography systems with Variable Shaped Beam (VSB) and Cell Projection (CP) provide a flexible solution to generate these kind of photonics structures even on large areas. In case of arbitrary curved structures intelligent data preparation software solutions as JES-approximation and target contour calculation can be applied. An example is given to demonstrate the feasibility of these approaches specifically on cell projection.
KEYWORDS: Optical gratings, Axicons, Air contamination, Vestigial sideband modulation, Scanning electron microscopy, Design and modelling, Optical components, Edge roughness, Electron beams, Electron beam lithography
BackgroundVariable shaped beam systems offer high performance for common Manhattan layouts using rectangular or axis-parallel triangular exposure primitives. Emerging optical applications often consist of numerous non-Manhattan structures. The common processing modes for slanted or curved structures result in high shot counts and thus large write times.AimA sophisticated approximation approach for arbitrary non-Manhattan layouts is needed. For repetitive non-Manhattan layouts, the use of cell projection (CP) should be considered.ApproachThe JES-approximation of data preparation software ePLACE is introduced and compared to common border approximation. CP in combination with ePLACE’s target geometry feature is studied. The different approaches are assessed in optical quality and throughput.ResultsHaze measurements of diffractive axicons verify the good optical quality of JES-approximation at moderate write times. Further improvements are enabled by mathematical input approximation (MIA). Scanning electron microscope (SEM) measurements of dot CP arrays validate the functionality of the target geometry approach for fine CD tuning. Write time studies confirm superior throughput results using CP in the exposures.ConclusionsFor arbitrary non-Manhattan layouts JES/MIA-approximation should be applied. For repetitive non-Manhattan layouts, CP exposure is the best solution.
KEYWORDS: Edge roughness, Optical gratings, Axicons, Electron beam lithography, Optical components, Lithography, Electron beams, Silicon photonics, Scanning electron microscopy, Electron beam direct write lithography
In emerging optical applications, curvilinear features increase lithography complexity, which leads to long e-beam write times. Multi beam mask writers offer a solution for high-end masks where curvilinear features are predominant. For mid-range masks and emerging optical applications especially variable shaped beam systems still offer advantages. The challenge for optical applications is to expose large-scale non-Manhattan layouts such as slanted gratings, circle arrays, or curved geometrical structures with high fidelity in an efficient way. For arbitrary curved structures, including 3D, a novel shot count optimized and edge roughness aware approximation (JES-approximation) approach by ePLACE data preparation software package (Vistec Electron Beam GmbH, Germany) is applied. In contrast to common fracturing, both throughput and pattern fidelity in optical applications are highly increased. The optical quality by means of high sensitive haze measurements of diffractive axicons is proven. For repetitive structures such as slanted gratings or circle arrays the cell projection (CP) option is the solution of choice, but CP is also effective for arbitrarily curved gratings. Key enabler is the data preparation software ePLACE where cell dose values are calculated to meet the target layout contours precisely. Both JES-approximation as well as cell projection with target contour calculation are powerful tools for an efficient data preparation and final exposure of non-Manhattan layouts.
In this communication, we report about the design, fabrication, and testing of echelle grating (de-)multiplexers for the
100GBASE-LR4 norm and other passive architectures such as vertical fiber-couplers and slow-wave waveguides in the
O-band (1.31-μm) for Silicon-based photonic integrated circuits (Si-PICs). In detail, two-point stigmatic 20th-order
echelle gratings (TPSGs) on the 300-nm-thick SOI platform designed for 4x800-GHz-spaced wavelength division
multiplexing featuring extremely low crosstalk (< -30 dB), precise channel spacing and optimized average insertion
losses (~ 3 dB) are presented. Distributed Bragg reflectors (DBRs) are used to improve the grating facets reflectivity,
while multi-mode interferometers (MMIs) are used in optimized perfectly-chirped echelle gratings (PCGs) for pass-band
flattening. Moreover, 200-mm CMOS pilot lines processing tools including VISTEC variable-shape e-beam lithography
are employed for the fabrication. In addition, wafer-level statistics of the multiplexers clearly shows the echelle grating
to be inherently fabrication-insensitive to processing drifts, resulting in a minimized dispersion of the multiplexer
performances over the wafer. In particular, the echelle grating spectral response remains stable over the wafer in terms of
crosstalk, channel spacing and bandwidth, with the wavelength dispersion of the filter comb being limited to just 0.8 nm,
thus highlighting the intrinsic robustness of design, fab pathways as well as the reliability of modeling tools.
As well as that, apodized one-dimensional vertical fiber couplers, optimized multi-mode interferometers (MMIs) and
extremely low-losses slow-light waveguides are demonstrated and discussed. The adiabatic apodization of such 1-D
gratings is capable to provide band-edge group indices ng as high as 30 with propagation losses equivalent to the indexlike
propagation regime.
The semiconductor industry and mask shops spend great efforts in order to keep pace with the requirements on pattern
fidelity of the ITRS lithography roadmap. Even for e-beam lithography - often referred to as technology with
"unlimited" resolution - the challenges increase with shrinking feature sizes in combination with applicable resist
processes. The pattern fidelity, specifically CD control, is crucial for the application of e-beam lithography.
One aspect in CD control is the intrinsic proximity effect of the electron beam. This together with other contributions
like influences from resist process or beam generation which are summarized altogether under the term process
proximity effect have to be corrected. An accurate e-beam process proximity effect correction is therefore a key
component of e-beam lithography.
Some process proximity effect correction algorithms provide not only accurate correction for the process proximity
effect induced pattern deformation but also optimize pattern contrast by adjusting geometry and dose simultaneously.
However, the quality of the process proximity effect correction is limited by the calibration accuracy of the used model,
i.e., the accuracy of the utilized process proximity function (PPF).
In a previous paper [R. Galler et al, "PPF - Explorer: Pointwise Proximity Function calibration using a new radialsymmetric
calibration structure", BACUS 2011] the PPF-explorer - a new experimental method for pointwise process
proximity function calibration - was introduced and some first promising calibration results were shown.
This paper presents the progress of the PPFexplorer proximity function calibration. This progress, among others,
comprises automatic generation of calibration patterns, including pre-correction with respect to a rough forecast of the
process proximity function to be calibrated. This pre-correction approach significantly reduces the number of necessary
calibration structures and the number of measurement sites, without sacrificing calibration accuracy. On the contrary, the
pre-correction has positive impact on the calibration quality, since it allows unifying the pattern contrast at the
measurement sites, which reduces the SEM measurement induced error.
We present the results of a PPFexplorer calibration with special focus on minimizing the number of measurement sites.
The results show that the PPFexplorer method can help to improve the proximity effect model calibration with
controllable efforts.
In the ITRS roadmap [1] increasingly long mask write and cycle time is explicitly addressed as a difficult challenge in
mask fabrication for the 16nm technology node and beyond. Write time reduction demands have to be seen in relation to
corresponding performance parameters like Line Width Roughness (LWR), resolution, placement as well as CD
Uniformity. The previously presented Multi Shaped Beam (MSB) approach [2, 3] is considered a potential solution for high
throughput mask write application. In order to fully adapt the MSB concept to future industry's requirements specific
optimizations are planned.
The key element for achieving write time reduction is a higher probe current at the target, which can be obtained by
increasing the number of beamlets as well as applying a higher current density. In the present paper the approach of a
256 beamlet MSB design will be discussed. For a given image field size along with a beamlet number increase both
beamlet pitch and size have to be optimized.
Out of previous investigations, one finding was that by changing the demagnification after the beam forming section of
the MSB column the overall performance can be optimized. Based on first electron-optical simulations for a new final
lens a larger demagnification turned out to be advantageous.
Stochastic beam blur simulation results for the MSB reduction optics will be presented. During the exposure of a pattern
layout the number of used beams, their shape and their distribution within the image field varies, which can lead to space
charge distortion effects. In regard to this MSB simulation results obtained for an image field of approximately
10x10ìm² will be presented.
For the 256 beamlet MSB design and resist sensitivities of 20μC/cm2, 40μC/cm2 and 100μC/cm2 write time and LWR simulations have been performed. For MSB pattern data fracturing an optimized algorithm has been used, which
increased the beamlet utilization factor (indicates the mean number of beamlets which are used per multi-shot). Finally
an update with regard to the required changes of the data path architecture for the 256 beamlet MSB approach will be
given. Data integrity as an important aspect of the production worthiness of such a systems will be discussed specifically.
Lithographic patterning encounters growing challenges to meet the requirements of current and future semiconductor
technology nodes. Even e-beam lithography is challenged due to the physical characteristic of the whole transfer process
including the e-beam blur, electron scattering, and resist effects. These effects cause an unavoidable blurring of the
exposed shapes and are often described as process proximity effect. Besides the correction of this process proximity
effect pattern contrast and process window for the lithography step have to be regarded. There are promising approaches
for contrast enhancing proximity effect correction concepts. To enable a stable patterning great efforts have to be put into
decreasing the errors of all involved technologies.
The blurring resulting from the transfer process is usually described by a so-called process proximity function (PPF) and
mostly approximated by a superposition of two or more Gaussian functions. All algorithms for proximity effect
correction use that PPF to perform their correction. Thus, an accurate determination of that PPF contributes to reducing
the error budget of the proximity effect correction scheme. Several methods for PPF calibration were introduced in the
past. Some are based on modelling the transfer process and performing Monte Carlo simulations. Another common
approach is to design and expose calibration patterns, measure the resulting CDs, and obtain the process proximity
function as the result of a simulation based parameter fitting to a model function such as a sum of Gaussian functions. In
order to respect the increased accuracy requirements an even more accurate description of the PPF is expected.
This paper describes the newly developed PPF-explorer method for the calibration of a pointwise proximity function as a
complementary technique, which is based on the exposure and evaluation of new calibration layouts. Following the
common assumption that a process proximity function is radial-symmetric, we developed radial-symmetric calibration
layouts.
For the manufacturing of semiconductor technologies following the ITRS roadmap, we will face nodes well below a 32-nm half pitch in the next 2 to 3 years. Despite being able to achieve the required resolution, which is now possible with electron beam direct-write variable-shaped beam equipment and resists, it becomes critical to precisely reproduce dense line space patterns onto a wafer. This exposed pattern must meet the targets from the layout in both dimensions (horizontally and vertically). For instance, the end of a line must be printed in its entire length to allow a contact to be placed later. Up to now, the control of printed patterns such as line ends was achieved by a proximity effect correction mostly based on a dose modulation. This investigation of line end shortening (LES) includes multiple novel approaches, and contains an additional geometrical correction to push the limits of the available data preparation algorithms and the measurement. The designed LES test patterns, which aim to characterize the status of LES in a quick and easy way, were exposed and measured at Fraunhofer Center Nanoelectronic Technologies using its state-of-the-art electron beam direct writer and CD-SEM. Simulation and exposure results with the novel LES correction algorithms applied to the test pattern and a large production-like pattern in the range of our targeted critical structure dimensions in dense line space features smaller than 40 nm will be shown.
KEYWORDS: Cadmium sulfide, Computer simulations, Semiconducting wafers, Electron beam lithography, Electron beams, Detection and tracking algorithms, Point spread functions, Electron beam direct write lithography, Modulation, Nanoelectronics
For the manufacturing of semiconductor technologies following the ITRS roadmap, we will face the nodes well below
32nm half pitch in the next 2~3 years. Despite being able to achieve the required resolution, which is now possible with
electron beam direct write variable shaped beam (EBDW VSB) equipment and resists, it becomes critical to precisely
reproduce dense line space patterns onto a wafer. This exposed pattern must meet the targets from the layout in both
dimensions (horizontally and vertically). For instance, the end of a line must be printed in its entire length to allow a later
placed contact to be able to land on it. Up to now, the control of printed patterns such as line ends is achieved by a
proximity effect correction (PEC) which is mostly based on a dose modulation.
This investigation of the line end shortening (LES) includes multiple novel approaches, also containing an additional
geometrical correction, to push the limits of the available data preparation algorithms and the measurement. The
designed LES test patterns, which aim to characterize the status of LES in a quick and easy way, were exposed and
measured at Fraunhofer Center Nanoelectronic Technologies (CNT) using its state of the art electron beam direct writer
and CD-SEM.
Simulation and exposure results with the novel LES correction algorithms applied to the test pattern and a large
production like pattern in the range of our target CDs in dense line space features smaller than 40nm will be shown.
Multi Shaped Beam (MSB) throughput simulation results have already been published in the past. An IC mask set of a
32nm node logic device was one of the applications that had been analyzed in more detail.
In this paper we want to highlight results of shot count and write time evaluations done for Inverse Lithography Technology
(ILT) masks targeting the 22nm technology node. The test pattern data we used for these practice-oriented analyses
was designed by DNP / Japan and created by Luminescent Technologies, Inc. / USA. To achieve reliable
evaluation results, the influence of different MSB configurations on shot count and mask write time has been taken into
account and will be discussed here. Exposure results of pattern details are presented and compared with the fracturing
result. The MSB engineering tool we used for our investigations covers such major components like an electron-optical
column, a precision x/y stage and the MSB data path.
For current and future semiconductor technology nodes with critical dimensions of 32 nm or below, the e-beam
lithography is faced with increasing challenges to achieve a reasonable patterning of structures, especially if a process
with a chemically amplified resist is used. The reasons for these limitations are the physical properties of the transfer
process used to print a structure onto the resist-coated substrate, which inherently contains an unavoidable blurring of the
deposited e-beam energy around the desired shape. This blurring is usually described by a so called process proximity
function (PPF) and mostly approximated by a superposition of two or more Gaussian functions. The PPF includes the e-beam
blur, electron forward scattering and resist effects (often described altogether by the so called alpha parameter of
the PPF [K. Keil et al, "Resolution and total blur: Correlation and focus-dependencies in e-beam lithography," J. Vac.
Sci. Technol. B 27, 2722 (2009)]) as well as the backscattering effect (often described by the so called beta parameter of
the PPF). When the desired critical dimensions of structures are near or below the alpha parameter of the PPF, depending
on their environment it may be just impossible to print the structures because of the vanishing image contrast. The PPF
model confirms this well-known behavior but also shows ways and limits for improvements.
This paper provides real pattern lithography results - comparing classical and GIDC correction - for exposures done on a
Vistec SB3050DW shaped e-beam writer. A performance comparison of the GIDC method and the classical dose
correction in terms of data preparation and writing time is presented.
The e-beam lithography is faced with increasing challenges to achieve a satisfying patterning of structures with critical dimensions of
about 32 nm or below. The reason for this issue is the unavoidable blurring of the deposited e-beam energy due to beam blur, electron
scattering (forward and backward), and resist effects. The distribution of the finally deposited dose differs from the dose weighted
geometry of the printed layout. In general, the finally deposited dose is described as convolution of the layout with a process specific
proximity function being a model for the unavoidable blurring. This process proximity function (PPF) is often approximated by a
superposition of two or more Gaussian functions. Thus, the electron forward scattering and resist effects, being most critical to the
pattern fidelity, are often described altogether by the so called alpha-parameter of the PPF. Due to these physical reasons, when the
desired critical dimension of a structure is near or below the alpha-parameter of the PPF, it may be just impossible to print the
structure because of the vanishing image contrast due to the blurring.
It was shown by means of the simulation feature of the ePLACE data prep package that in this situation a modification of both the
geometry and the dose assignment of the shapes will significantly increase the contrast of the deposited energy and thus, even preserve
the printability of critical structures. This geometrically induced dose correction (GIDC) method is implemented in the ePLACE
package. The simulation results for test structures are now validated by exposures of test patterns and its results clearly establish the
practical advantage of the new method.
In this paper we will publish the results of the related exposures - done on Vistec SB3050 series shaped e-beam writers -
demonstrating the practical importance of the GIDC method for layouts with critical dimensions of 32 nm and below.
Photomask lithography for the 22nm technology node and beyond requires new approaches in equipment as well as
mask design. Multi Shaped Beam technology (MSB) for photomask patterning using a matrix of small beamlets instead
of just one shaped beam, is a very effective and evolutionary enhancement of the well established Variable Shaped Beam
(VSB) technique. Its technical feasibility has been successfully demonstrated [2]. One advantage of MSB is the
productivity gain over VSB with decreasing critical dimensions (CDs) and increasing levels of optical proximity
correction (OPC) or for inverse lithography technology (ILT) and source mask optimization (SMO) solutions. This
makes MSB an attractive alternative to VSB for photomask lithography at future technology nodes.
The present paper describes in detail the working principles and advantages of MSB over VSB for photomask
applications. MSB integrates the electron optical column, x/y stage and data path into an operational electron beam
lithography system. Multi e-beam mask writer specific requirements concerning the computational lithography and their
implementation are outlined here. Data preparation of aggressive OPC layouts, shot count reductions over VSB, data
path architecture, write time simulation and several aspects of the exposure process sequence are also discussed.
Analysis results of both the MSB processing and the write time of full 32nm and 22nm node critical layer mask layouts
are presented as an example.
KEYWORDS: Beam shaping, Photomasks, Single sideband modulation, Medium wave, Resolution enhancement technologies, Lithography, Electron beam lithography, Electron beams, Critical dimension metrology, Data processing
The requirements for advanced lithography solutions are constantly increasing. Up to now the optical lithography with
its extension into the immersion lithography and strong resolution enhancement techniques (RET) represents the
lithography solution of choice. With decreasing critical dimensions (CD) new approaches are needed to provide cost
effective methods for small and medium volume production on one side and for efficient photomask fabrication
including the RET on the other side.
A viable solution for both application fields is the Multi Shaped Beam (MSB) technology, which is currently being
developed at Vistec Electron Beam in Jena. E-beam technology has already been used for R&D as well as prototyping
applications well ahead of the respective production technology node. It is as well the technology of choice for the future
mask fabrication. However, the decreasing CD and thus increasing pattern density asks for new ideas to overcome the
throughput challenges faced today. This bottleneck is addressed by parallel writing methods where MSB is one of these
techniques.
In correlation with the MSB writing technology an appropriate data preparation path is mandatory. One major criterion
for the performance of MSB data processing is the shot count reduction which can be reached for different types of
patterns. In this paper results from an analysis of the current status of MSB shot segmentation are reported. Beside
collecting statistical data of the individual structure size distribution an analysis of the shot count on different pattern
coming from mask write as well as direct write applications was carried out. This was performed for different technology
nodes and the results are compared.
At the EMLC 2009 in Dresden the data preparation package ePLACE was already presented. This package has been
used for quite different applications covering mask write, direct write and special applications. In this paper we will
disclose results achieved when using the ePLACE package for processing of layout data of immediate interest. During
the evaluation phase of the new solution we could benefit from broad experience we collected over many years with the
fracture performance of the MGS software, which is one core element of today's ePLACE package.
A key interest of this paper is the investigation of the scalability of computing solutions as a cost-effective approach
when processing huge data volumes with the new solution. This is reflected against current state-of-the-art data processing
tasks being part of both mask write and direct write applications.
Furthermore, we evaluated visualization and simulation possibilities of the ePLACE package with respect to its use with
latest layouts in various applications.
The improved performance of the data preparation package including its adaptation to new e-beam lithography options,
as, for instance, the incorporation of the cell projection capability or the newly developed Multi Shaped Beam (MSB)
technology, will be also discussed.
As an example the matching of the data path with a Vistec SB3055 will be outlined. Processing of Design For E-Beam
(DFEB) data (including cell contents) and their conversion to real exposure data is reported. The advantages of the
parallel use of standard shaped beam und cell projection technologies are highlighted focussing on latest writing time
yields achieved when applying the CP feature.
KEYWORDS: Vestigial sideband modulation, Electron beam direct write lithography, Electron beam lithography, Beam shaping, Scanning electron microscopy, Standards development, Lithography, Prototyping, Semiconducting wafers, Electron beams
The ever more demanding requirements in the semiconductor manufacturing sector together with the increasing mask making costs and cycle times call for new lithographic solutions. Electron beam lithography has shown its superior performance and flexibility in advanced patterning applications. It enables already today process and technology developments ahead of the ITRS roadmap, which addresses currently the 32nm and 22nm node or even below. Thus electron beam direct write (EBDW) can avoid the high costs and delay times related to the advanced masks required for critical layers.
On the other side EBDW faces the concerns regarding its throughput, which bases upon the inherited sequential exposure method. A solution to improve the throughput performance offers the implementation of the cell projection method as already materialized in the Vistec SB3055 tool. In addition to the variable shape beam technology, which can project regular structures (rectangles, slants and triangles) only, cell projection is able to image complex structures. Thus, structures that would have required a multiple of regular shots are now projected in one single shot. Thanks to this approach not only the shot count is noticeably reduced, but also the overall throughput is increased. First experimental and simulation results show an improvement of a factor of about 3X. Nevertheless, the final throughput gain strongly depends on the pattern and data structure itself.
Combining high resolution variable shape beam technology with the cell projection feature allows advanced R&D and small volume and prototyping applications to be performed with one system. The Vistec SB3055 features the high resolution capability of variable shape beam lithography and incorporates the advantages of the cell projection technology. Owing to this new option we are able to improve the throughput for standard design features while maintaining the required high accuracy of our exposure system. Beside this, the combination of cell projection and standard shape beam technology still offers a high degree of flexibility as the key advantage of EBDW.
On the Vistec SB3055 system we have performed different resolution tests serving as comparison between cell projection and standard shape beam. In this paper we will present the resolution capability obtained with cell projection on test structures as well as the general accuracy achieved for real patterns.
KEYWORDS: Optical alignment, Semiconducting wafers, Optical lithography, Electron beams, Electron beam direct write lithography, Lithography, Signal to noise ratio, Overlay metrology, Signal detection, Wafer testing
With shrinking dimensions in the semiconductor industry the lithographic demands are exceeding the parameters of the
standard optical lithography. Electron beam direct write (EBDW) presents a good solution to overcome these limits and
to successfully use this technology in R&D as well as in prototyping and some niche applications. For the industrial
application of EBDW an alignment strategy adapted to the industrial standards is required to be compatible with optical
lithography. In this context the crucial factor is the overlay performance, i.e. the maturity of the alignment strategy under
different process conditions. New alignment marks improve the alignment repeatability and increase the window of the
signal-to-noise ratio towards smaller or noisier signals. Particularly the latter has proved to be a major contribution to a
higher maturity of the alignment. A comparison between the double cross and the new Barker mark type is presented in
this paper. Furthermore, the mark reading repeatability and the final overlay results achieved are discussed.
KEYWORDS: Optical alignment, Monte Carlo methods, Sensors, Silicon, Signal to noise ratio, Signal detection, Semiconducting wafers, Vestigial sideband modulation, Electron beam direct write lithography, Lithography
New types of alignment marks to be applied in electron beam direct write (EBDW) have been studied theoretically and
experimentally.
The dependence of signal contrast and signal form on such mark properties like step height, mark pitch and stack
material has been investigated in detail using Monte Carlo simulations.
The different alignment marks were etched in Si to different depths and the respective alignment repeatability was determined
with a Vistec SB3050 DW lithography tool. Finally, for the most promising mark, test exposures were performed
and the overlay determined.
An easy way to pattern 65nm CD target, when optical lithography technology is not available, is to use an Electron Beam Direct Write tool (EBDW), which is well known for its high resolution patterning potentials, with the drawback of a very low throughput. Emerging techniques of electron projection lithography also propose the same patterning capability with enhanced throughput. One of the most crucial issues, when dealing with integration, is the overlay capability of the systems. This paper exposes the studies made on the overlay capability issue of the LEICA EBDW installed in STMicroelectronics (STM) production plant in Crolles (France) and proves our tool is ready to support the 65nm node technology development.
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