Intel will start high volume manufacturing (HVM) of the 65nm node in 2005. Microprocessor density and performance trends will continue to follow Moore's law and cost-effective patterning solutions capable of supporting it have to be found, demonstrated and developed during 2002-2004. Given the uncertainty regarding the readiness and respective capabilities of 157nm and 193nm lithography to support 65nm technology requirements, Intel is developing both lithographic options and corresponding infrastructure with the intent to use both options in manufacturing. Development and use of dual lithographic options for a given technology node in manufacturing is not a new paradigm for Intel: whenever introduction of a new exposure wavelength presented excessive risk to the manufacturing schedule, Intel developed parallel patterning approaches in time for the manufacturing ramp. Both I-line and 248nm patterning solutions were developed and successfully used in manufacturing of the 350nm node at Intel. Similarly, 248nm and 193nm patterning solutions were fully developed for 130nm node high volume manufacturing.

This report shows characteristics of a new negative-tone CAR (MES-EN1G), that we have developed. The CAR is adopted new cross linker that is concentrated more at the bottom of the resist film. The new cross linker raises cross-linking reaction rate at the bottom of resist film. Therefore, undercut profile on chromium film is not observed and vertical resist profile is obtained. The CAR can resolve 150 nm L and S pattern, and so the CAR has the ability to form assist bar feature. Vertical chromium profile is obtained and residual resist thickness is 260 nm after reactive ion etching. The CAR has enough etching durability. Regarding post exposure delay stability in vacuum (PED(Vac.), CD change is 0.3 nm even if exposed mask is left in vacuum for 10 hours. Dependence on PEB temperature is 3.0nm / degrees C. Regarding post coating delay (PCD) effect, the maximum CD error is within +/- 5.0 nm even though masks coated with the CAR are left in a conventional blanks case for 39 days. Dependence on fogging effect is 4.1 nm /percent. Opaque line CD uniformity (3s) of 600 nm L and S pattern in local area with MES-EN1G and with positive-tone CAR is 4.6 nm and 11.9 nm, respectively.

Positive tone chemically amplified resists CAP209, EP012M (TOK), KRS-XE (JSR) and FEP171 (Fuji) were evaluated for mask making. The investigations were performed on an advanced tool set comprising of a Steag coater ASR5000, Steag developer ASP5000, 50kV e-beam writer Leica SB350, UNAXIS MASK ETCHER III , STS ICP silicon etcher and a CD-SEM KLA8100. We investigated and compared resolution, sensitivity, resist slope, dark field loss, CD-uniformity, line edge roughness, and etch resistance of the evaluated resists. Furthermore, the influence of post coating delay, post exposure delay and other process parameters on the resist performance was determined.

The critical dimensions (CD) change by the process delay is the most critical issue to use the chemically amplified resists (CAR) for photomask fabrication. In the photo-mask fabrication processes, the resist should have both post coating delay (PCD) and post exposure delay (PED) stability, while keeping higher sensitivity. To achieve this requirement, overcoat process has been examined for the purpose of CD stabilization in CAR process for photomask manufacture. The material, which consists of hydrophobic polymer and photo acid generator (PAG), was used for the overcoat in this study. It has been proved that the overcoat shows the effect of controlling CD change, and applying the overcoat does not generate a fatal number of defects and pinholes. From these results, it is thought that the overcoat process is promising for the size stabilization in photomask manufacture for 100 nm devices.

We have investigated a new pattern correction method for reducing pattern critical dimension (CD) errors due to a variety of pattern layouts and densities. Together with conventional proximity effect correction and fogging functions in an electron beam (EB) writing process, the new pattern correction was introduced for correcting CD errors that occur during a dry etching process. A rule-based OPC software was used to modify EB pattern shapes. In addition to the spaces between neighboring patterns, the surrounding pattern density was chosen as a correction parameter. First, we optimized the pattern correction table by measuring the CDs of various symmetric 3 lines with 5 levels of surrounding pattern densities. Next, we applied the pattern correction to semi real device patterns. From the measurement for 100 patterns of them, CD uniformity of 15.0 nm (3-sigma) was obtained. We confirmed the effectiveness of the pattern correction method.

A continuous improvement study of the Gen III ICP MoSi etch process is accomplished through the use of high resolution factorial experimental design (DOE). The main goal of this work is to more fully characterize the process space within a commercial GEN III MoSi plasma etch process reactor. Particular emphasis is placed upon the improvement of CD bias loss as well as isolated/dense feature linearity within the same mask pattern. CD uniformity is also monitored as well as MoSi etch profile. Several novel etchant gases are exported prior to the Designed Experiment to characterize the effect of alternate chemistries on MoSi etch performance; these results are reported. The Designed Experiment was utilized to optimize the most promising alternate gas chemistry in terms of CD performance, MoSi Etch Rate uniformity and Selectivity to Quartz. The novel gases included a known polymerizing etch gas as well as etch rate enhancement gases which have also historically been used within the silicon process industry to enhance selectivity to silicon dioxide and presumably, quartz.

There is considerable interest in phase shift masks as a route to extending the resolution, contrast, and depth of focus of lithographic tools beyond what is achievable with the normal chrome mask technology. A problem that has so far hindered the introduction of phase shift masks has been the difficulty of phase and transmittance control when a phase shift mask is applied to practical use. Also, to apply phase shift layer (MoSiON), it remains that effects several critical mask parameters including sidewall slope, surface roughness, and critical dimension. For these reasons, this process requires a high degree of control of the etch process of shift layer. So in this paper, we described a technique for the fabrication of phase shift masks by etch rate of a MoSiON layer. Etching experiments of MoSiON were performed using different fluorinated gas mixtures. Four of them, CF₄/O₂/He, SF₆/O₂/He, CHF₃/O₂/He and Cl₂/CF₄/O2/He were chosen for high etch rate, sidewall slope, and surface morphology. Each added gases had a unique property on the etch rate, anisotropy, surface roughness and sidewall morphology. Result indicates that vertical slope and smooth surface are obtained using the Cl₂/ CF₄/O₂/He and SF₆/O₂/He mixture. With increasing O₂ flow rate to the SF₆/O₂/He Plasma and added Cl₂ gas to the CF₄/O₂/He Plasma, the MoSiON etching profile becomes anisotropic without undercutting and trench profile. It is probably due to both increasing etch rate and sidewall passivation of Cl₂ ion flux. When Cl₂ gas was added to the CF₄/O₂/He Plasma, the small addition of chlorine was enough to protect the exposed sidewall of the undercutting, therefore, higher flow rate of chlorine had to be added to protect the sidewall of the undercutting by forming a sidewall passivation layer. These results show that both increasing O₂ flow rate to the SF₆/O₂/He Plasma and the addition of Cl₂ to the CF₄/O₂/He plasma are necessary in order to achieve a vertical profile and a smooth surface morphology.

In this paper, optical emission spectroscopy is used to characterize and monitor chrome etch processes on the Etec Tetra photomask etch chamber. Changes in process conditions, such as source power, bias power, pressure, and gas flows have been captured by time-averaged optical emission traces. Using multi-wavelength OES data collected during chrome etching, a fingerprint of the plasma was taken. The fingerprint was generated using a principal component analysis (PCA) technique, which detects spectral correlation between multiple wavelengths. The PCA reduces the dimensionality of the multi-wavelength OES and extracts just the most relevant information. The new variables are created as linear combinations of the original variables. The new principal component peaks diminish more than the original peaks, allowing strong endpoint detection for a 1 percent chrome-loaded mask.

Lithography technology trend is described in view of DRAM devices. Lowering k₁ factor is a way to push the existing exposure tools further down to where an improved tool might take the place. Four different aspects have been studied to lower k₁ factor: resist and resist process, design layout, exposure tool, and complex mask. Thin resist, silicon containing bi-layer resist process, and chemical attaching process (CAP) allows k₁ factor. In a low k₁ factor regime, the importance of a defect level control and CD shrinkage control is mentioned. A litho-friendly design proves to be very effective. From exposure tool point of view, flare effect and lens aberration effect are stressed along with proposing a customized OAI, which proves to be a good method to lower k₁ factor. A novel complex mask with heavy OPC features is introduced. If all or most of the techniques suggested above are realized, moving toward k₁ facto of 0.3 or below will come true. With the era of low k₁ factor of 0.3 or below, ArF lithography can be extended to a device generation of approximately 65 nm which F₂ lithography was thought to be used.

Embedded attenuated phase shift masks (EAPSMs) are being used in the semiconductor industry for high-density patterning of critical layers, such as gate and contact layers of circuit devices, of the 130 nm node and beyond. This paper focuses on the manufacturing and inspection of ternary (tritone) phase shift masks designed for the 130 nm design-rule generation. The manufacturing flow is presented and the use of the ARISTM100i mask inspection system for inspection is demonstrated.

As new resolution enhancement techniques (RETs) are adopted to progress beyond 100 nm, the costs and benefits to the overall system of data handling must be viewed as an overall system. A 'state' approach to viewing flows has been very useful for determining insertion points for several RETs. Data preparation is a necessary part of the transformation from layout to mask. The data manipulations of required for RET also fall in this space between layout and mask. When separate point tools are used to carry out these different manipulations, increasingly large amounts of time are required to simply move data from one point tool to the other. As data file sizes increase as expected over the next decade, this problem will increase by orders of magnitude. None of this time is providing any additional productivity for data preparation. The result has been pressure to provide an integrated solution, in which OPC, phase assignment, and data preparation all share a single database. This delays flattening the data until the last necessary moment, presumably in the mask writer itself.

Electronic layouts are usually flattened on their path from the hierarchical source downstream to the wafer. Mask data preparation has certainly been identified as a severe bottleneck since long. Data volumes are not only doubling every year along the ITRS roadmap. With the advent of optical proximity correction and phase-shifting masks data volumes are escalating up to non-manageable heights. Hierarchical treatment is one of the most powerful means to keep memory and CPU consumption in reasonable ranges. Only recently, however, has this technique acquired more public attention. Mask data preparation is the most critical area calling for a sound infrastructure to reduce the handling problem. Gaining more and more attention though, are other applications such as large area simulation and manufacturing rule checking (MRC). They all would profit from a generic engine capable to efficiently treat hierarchical data. In this paper we will present a generic engine for hierarchical treatment which solves the major problem, steady transitions along cell borders. Several alternatives exist how to walk through the hierarchy tree. They have, to date, not been thoroughly investigated. One is a bottom-up attempt to treat cells starting with the most elementary cells. The other one is a top-down approach which lends itself to creating a new hierarchy tree. In addition, since the variety, degree of hierarchy and quality of layouts extends over a wide range a generic engine has to take intelligent decisions when exploding the hierarchy tree. Several applications will be shown, in particular how far the limits can be pushed with the current hierarchical engine.

Device performance and functionality can be impacted by many factors, both physical and electrical. Close interaction between the lithographer and mask maker is useful in the deconvolution of the mask contributions to device speed and functionality. Across plate image size variation, linearity, orientation and proximity effects (both local and global) influence the Across Chip Linewidth Variation (ACLV). ACLV, in turn, has a strong correlation to overall device performance. Several situations in which integrated circuit functionality and performance were correlated to mask systematics will be presented along with resolution of the described issues. Methodologies for separating the mask components from the wafer level process components will also be discussed. Mask specifications are often derived by simply scaling the previous technology, rather than basing the specifications on technical requirements. A methodology will be derived which links technological device specifications and the anticipated mask exposure conditions to the required mask specifications.

In previous papers, [BACUS 2000 4186-13 and BACUS 2001 4562-20], developments in hierarchical fracturing and in distributed processing in the CATSTM tool were studied. This study investigates the advances in the CATSTM tool that combine hierarchical fracturing and distributed processing. Time-consuming processes such as PSM, OPC and de-slivering logic for shaped beam machines are addressed. The attendant hierarchical fracturing commands are reviewed and commands associated with distributed processing are introduced. Hierarchical and flat data fracture times are compared, as well as threaded fracture and distributed fracture times. The resulting benefits are tabulated.

We describe in more detail a mask data preparation (MDP) flow previously proposed. The focus on this paper is a performance comparison of hierarchical fracturing techniques compared to standard fracturing. Our flow uses GDSII data as input, including a GDSII-based job deck description. The output is maximally compacted, trapezoidal mask writer (MW) formatted data. Our flow takes advantage of hierarchy explicit in the GDSII file(s). This allows optimal determination of 'cover cells', which are repeatable groups of patterns within the data. The use of cover cells allows a reduction of fracturing runtime. In one case, a 21 GB MEBES file was fractured in 30 hours using the standard technique and 53 minutes using the hierarchical cover cell technique.

Layouts of semiconductor integrated circuits are composed of polygons. Ideally, all edges of polygons are either orthogonal or 45-degree with respect to the layout coordinate axes. Yet there are cases that non-ideal edges, which are not orthogonal or 45-degree, exist in layouts. From the perspective of data preparation, benefits can be obtained to exclude those non-orthogonal and non-45 degree edges in chip layouts, since the existence of non-ideal edges will have negative impacts on both mask fracturing and the optical proximity correction process. In addition, e-beam writing time could be significantly prolonged with the presence of non-ideal edges. Currently, most design rule check tools are able to locate non-ideal edges. However, there is not any generic solution available for those non-ideal edges. In the present study, an algorithm was developed to renovate those non-ideal edges of chip layouts. A major success criterion that must be fulfilled is that any additional data process is not allowed to alter the original device behavior. Therefore, the renovation process must be made of as minimal change as possible. The present algorithm is implemented in the C language, which makes it generic to be easily incorporated into most layout tools. Several illustrative cases were used to examine the present algorithm. Finding the best solution with the minimal edge movement among those non-unique solutions was also addressed with theoretical discussion.

The request of pattern recognition has been frequently brought up by both mask and wafer engineers. Despite different intentions, pattern recognition is usually the first step of many applications and hence plays a major role to accomplish certain tasks. For the purpose of this work, pattern recognition is defined as searching a specific polygon or a group of particular patterns from a chip layout. Operator scan is truly not an efficient approach of pattern recognition, in particular, for cases with huge design database of advanced semiconductor integrated circuits. Obviously, an automation system of pattern recognition is necessary and benefits the data preparation process. Two categories of pattern recognition are discussed in the present study, 'fuzzy search' and 'exact match.' Each category has its own application, but the searching algorithms could be much different. Details of searching algorithms are given for both categories of pattern recognition. Due to the nature of industrial standard, the scope of the present application is limited to database with GDSII format. Hence, coordinate searching is internally used inside the searching engine.

Raster scan pattern generators have been used in the photomask industry for many years. Methods and software tools for data preparation for these pattern generators are well established and have been integrated into design flows with a high degree of automation. But the growing requirements for pattern fidelity have lead to the introduction of 50 kV variable shaped beam pattern generators. Due to their different writing strategy these tools use proprietary data formats and in turn require an optimized data preparation. As a result the existing design flow has to be adopted to account for these requirements. Due to the fact that cycle times have grown severely over the last years the automation of this adopted design flow will not only enhance the design flow quality by avoiding errors during manual operations but will also help to reduce turn-around times. We developed and implemented an automated design flow for a variable shaped beam pattern generator which had to fulfill two conflicting requirements: Well established automated tools originally developed for raster scan pattern generators had to be retained with only slight modifications to avoid the (re)implementation and the concurrent usage of two systems while on the other hand data generation especially during fracturing had to be optimized for a variable shaped beam pattern generator.

We conducted an experiment to determine if the use of image filter method for simulation that calculates the distribution of light intensity on a wafer can reduce processing time in comparison to the use of the Fourier transform. The image filter table value is set by changing the value of Gaussian distribution. The image filter method was approximated with the light intensity of optical simulation that keeps accuracy within the range of the allowance. In this experiment, we examined the differences between the distributions calculated using the Fourier transform and the calculation time by varying the sizes of the image filter tables. For the experiment, we used pattern data having a line width that used in the most advanced technology. When the area of pattern data was wide, the experiment revealed that use of the image filter method reduced calculation time by approximately 50 percent or more in comparison to a simulation that used the Fourier transform. As we decreased the size of the image filter tables, the calculation time became shorter, but the differences from the distribution calculated using the Fourier transform became larger. We intend to study the possibility of simulation by expanding the area of pattern data and using the image filter method for simulation-based OPC.

In typical rule- or model-based optical proximity correction (OPC) the goal is to align the silicon layout edges as closely as possible to the corresponding edges in the design layout. OPC precision requirements are approaching 1nm or less at the 0.1mm process node. While state-of-the-art OPC tools are capable of operating at this accuracy, such tight requirements increase computational cycle time, output file size, and photomask fabrication cost. Accuracy requirements on different features in the design may vary widely, and regions that do not need the highest accuracy can be exploited to reduce OPC complexity. For example, transistor gate dimensions require tighter dimensional control than interconnect features on the polysilicon layer. Furthermore gate features typically occupy less area than interconnect. When relaxed OPC accuracy requirements are applied to the interconnect features, but not the gate features, the overall complexity of the polysilicon mask pattern can be significantly reduced without losing accuracy where it counts.

There is a simple algorithm to translate the dense contacts of a regular design into a well assigned two phases in this paper. Some of its basic variant applications and a procedure to detect the phase assignment errors for the whole chip layer to insure the whole chip phase assignment success are also included. The variant applications include to add the assist features and assign the phases between the main features and the assist features and the post rule bias consideration. This executable environment makes the alternating PSM easy to be applied in the bright field of the dense contact.

Mask errors increasingly contribute into the CD error budget degrading quality of empirical OPC models and fidelity of the OPC features. Though the importance of studying mask error enhancements for the various feature types is well understood, the traditional MEEF theory embraces only simple features like dense lines or contacts, with a single degree of the mask distortion freedom. Complex mask shapes, including those that are routinely generated by OPC, or interactions between neighboring mask errors, have proven extremely difficult to analyze by the traditional MEEF theory. Motivated by the necessity to extend the traditional 1D approach, in previous works the authors introduced G-MEEF (Generalized Mask Error Enhancement) theory to explore complex 2D mask distortions. In this theory, mask and correspondent wafer errors were expressed as contour distortion vectors. The error enhancement is described by MEEM (Mask Error Enhancement Matrix) that transforms mask errors into the wafer distortions. MEEM captures complex effects of the self- and cross- enhancements when neighboring mask features collectively contribute into the wafer errors. Here we concentrate on G-MEEF applications. We study G-MEEF of SRAF structures and hammerheads. Inversion of the MEEM matrix can be used to conduct strict OPC corrections. We discuss different forms of OPC algorithms based upon this conversion.

The benefit of assist feature has been greatly appreciated in the aspect of bringing the process windows of isolated and semi-isolated patterns into together with that of dense patterns; hence a common process window is attainable. The width of assist feature and the distance between assist feature and main pattern are two basic, fundamental specifications from the viewpoint of lithographer. In fact, there exist other specifications that are essential to success of assist feature implementation. For instance, the distance of two adjacent assist features and the gap between ends of assist feature to main patterns are all of necessity in terms of lithographic performance. From the perspective of feasibility and ease of photomask fabrication there are some specifications and/or constraints that should be implemented and enforced. One illustrative example is the extent of assist feature end pullback as two slightly off- axis assist features either joint or separate with a distance smaller than a given minimum space. Recently, the request of multiple assist features has enormously increased. The task of implementing multiple assist features is not trivial at all; the fact is that it introduces many more specifications to be contended. Under most circumstances, the implementation of assist feature involves lithographic engineers, mask-making engineers, and CAD engineers or script implementation engineers; this brings out the importance of communication mechanism that can describe the true intention of each specification. The question is that whether the mechanism is sufficient or not. The goal of the present work is to develop templates of specifications for assist feature implementation. Currently, many conditions and constraints have been identified and collected. One example is the central-edge template, which is allowed to prioritize the 'central assist feature' vs. 'edge assist feature.' It is believed that with the presence of specification templates both CAD and script implementation engineer will have a clear and consistent guideline to achieve the true intention of each specification.

As the CD specification on Masks is getting more tighten, the fogging effect by re-scattered incident electron at a high acceleration e-beam system and the loading effect at dry etching step due to pattern density are current critical issues for mask making. These give rise to the variation of mean CD value and the degradation of global CD uniformity. So we have to correct these effects accurately in order to meet the CD specification for design rule 0.15um or below devices. In this paper, we have applied a new positive CA (chemically amplified) resist from Fuji Film Arch co., It was written at 50 kV variable vector scan E-beam system and we tried to classify the CD error by the fogging and loading effect, respectively. Also we have compared with ZEP7000 resist, non-CAR positive type, which is used widely for conventional e-beam mask making to assess the CAR performance, especially in terms of CD error causing by the fogging effect. Through this comparison test, we found that the CD error due to the fogging effect shows somewhat different value according to resist type and writing strategy even though use same exposure dose. In this paper, we have assumed that such results are due to the difference of dose latitude. Dose latitude is different as intrinsic contrast value of each resist and writing strategy such as writing pass, should affect on beam profile (dose profile), it can also change pattern profile of resist and it can finally cause a dose latitude difference. Finally, we have evaluated for CD mean error and uniformity error by fogging and etch loading as open ratio changing, respectively.

A negative-CAR for EB reticle fabrication beyond 100 nm node is needed, which is superior in performance such as resolution, sensitivity, pattern quality, CD movement by process delays (PCD, PED) and process latitudes. We started preliminary screening on negative-CARs, and more than 10 resists out of 3 suppliers were examined including some that were still under development. Then, three CARs (A-2, B-1 and C-3) was selected as candidates, and those candidates were evaluated in 'resolution and sensitivity', 'pattern quality', 'CD movement due to process delays' and 'process latitudes'. B-1 turned out to be the best choice in total performance. In addition, thinning coating thickness was investigated for resolution improvement. A negative-CAR for EB reticle fabrication beyond 100 nm node is needed, which is superior in performance such as resolution, sensitivity, pattern quality, CD movement by process delays (PCD, PED) and process latitudes. We started preliminary screening on negative-CARs, and more than 10 resists out of 3 suppliers were examined including some that were still under development. Then, three CARs (A-2, B-1 and C-3) was selected as candidates, and those candidates were evaluated in 'resolution and sensitivity', 'pattern quality', 'CD movement due to process delays' and 'process latitudes'. B-1 turned out to be the best choice in total performance. In addition, thinning coating thickness was investigated for resolution improvement.

KRS-XE is a chemically amplified resist developed to enable electron-beam lithography for mask making at the 100nm node. This material has been shown to provide an excellent process window for mask manufacturing at this node. Characterization of this material using both 50keV raster and 75keV vector scan e-beam exposure systems will be presented. A higher sensitivity version of this material has been developed specifically for a vector, shaped beam 50keV application. Initial mask manufacturing results for this higher sensitivity version of KRS-XE will be presented for 75keV. In addition, recent developments using KRS-XE formulations modified to achieve high sensitivity and improved etch resistance will be discussed.

Most advanced EB masks enhanced resolution are fabricated by CAR photo resist recently. The non-CAR resist would be unsatisfied with making the 0.1 micrometers -below advanced mask fabrication, even for the current 0.13 micrometers -generation high-end masks. Although CAR has the well-known advantages of high-contrast resolution and sensitivity, the complex process behaviors related with different CAR types need to be further investigated. Negative-type CAR ha been widely used to fabricate advanced masks in mask shops. However, positive-type CAR is not well developed to apply for production since it is not investigated yet very well. Therefore, there is an essential necessity to realize the discrepancy between positive and negative CAR. This paper describes the different process phenomenon existing between positive CAR and negative CAR. We made the comparison of difference between t them by conducting ga series of simple experiments: the dose sensitivity test was produced by writing the dose matrix pattern on masks with three different baking temperatures and measuring the selectivity by depth profiler. This selectivity defined here was the thickness of resist after developing, which is indicative of completeness of development, but not the etching selectivity. All process-regarding SEM pictures were captured to determine the best ADI pattern resolution and the related CD measurement was also performed by CD-SEM. From the OPC resolution and available CD information we would set an appropriate process condition for these CAR. After that, a critical layer pattern on the mask was designed to find the optimal process settings. Moreover, all defects were inspected with KLA Tencor Tera Star SLF27 inspection system to give the defect status of CAR. The test masks were written by JBX-9000MV E-beam writing system. The basic property of CAR process for mask fabrication was evaluated in this study.

The coating procedure of polymer solutions by the scanning technique is developed for LSI technologies at the next generation, where a polymer solution as resists and inter-layer dielectric films is coated on a flat substrate, and then only the solvent is vaporized and removed, and finally the thin film is remaining there. In case of applying to the photo-lithography process, scan coating and its drying processes work together for astonishing flatness in 1% fluctuation range. When the coated polymer solution is dried under reduced pressure or vacuum, the thickness distribution of the resultant film should be accurately prospected and controlled by parameters. The film thickness is generally thicker at the edge and thinner inside from there than the average thickness. A typical thickness profile of a resist film is shown in Figure 1 . The phenomena are always observed, but have not been analyzed numerically. In this paper, we report a numerical model of the drying process of liquid film including polymers and give the essential parameters to the coating and drying processes. The parameters are focused on a vaporization rate, diffusion coefficients, coated solution thickness and intrinsic viscosity, which were calculated by simplified dynamical models of Langmuir's vaporization rate equation and Einstein relation at complex polymer solutions.

Atmospheric pressure deep UV lithography using fast chemically amplified photoresists (CAR) will be the mainstay of photomask production into the foreseeable future. Issues surrounding the sensitivity of chemically amplified photoresists to molecular bases such as ammonia, NMP, TMA and related compounds, have been the sources of intensive study and numerous publications1,2,3. Photoresist sensitivity issues challenge photoresist suppliers' abilities to improve resistance to airborne molecular contamination, equipment suppliers' abilities to control molecular bases within the tool and photomask/reticle manufacturers' capability to adapt their cleanroom environments and lithography processes for CAR.

In fabrication of next-generation photomask for devices under 100 nm, more precise control of critical dimension (CD) is required. Each process for the photomask fabrication must be developed corresponding to each requirement of CD accuracy. The same applies to post-exposure baking (PEB) and post-coat baking (PCB), and so more precise control of reaction amount in baking is required. Multiple zone-controlled type of hot plate to improve uniformity of temperature has been enthusiastically developed Generally, conventional hot plates don't directly control the temperature of resist film because its measurement means, for example, thermo-couples or resistance bulb are embedded near the surface of hot plate, and so cannot accurately control resist temperature. We think next-generation baking technology should involve direct measurement and control of the actual temperature of films. Furthermore, serious problems arose in that heat history in PEB was different in each pattern area, such as mask center or edge, and large overshooting of temperature was caused in photomask baking because heat capacity of quartz is very large and heat transfer speed of quartz is very slow. To solve this problem, it is necessary to control resist temperature directly by means of a quick response. It is difficult to satisfy this requirement with conventional bakers of the hot plate type or with such bakers to which a minor improvement has been made to achieve the quick response. To realize the quick response, the four following concepts are needed. (i) Quick response of heat source for resist film (ii) Direct measuring of temperature of resist film (iii) Shortening interval of feedback (iv) Improvement of repeatability ofmeasuring temperature We have studied a candidate next-generation baking technology for photomask fabrication, namely a novel baking system consisting of halogen lamps and non-contact type thermometers. We call this novel baking system "Lamp Heater System". In this paper, the heating performance is reported.

Process optimizations have been done to carried out xon '0.13micrometers ' reticle manufacturing with feature sizes of under 520nm. Micro-leading < 10nm and CD uniformity (3S) < 10nm process for binary Cr reticle can be achieved with dry etching process using chemical amplify resists blanks. HL-950 writer with resist films of 400nm and dy etching with Centura system were adopted for the purpose. It has shown that by optimizing selectivity window in Centura system without assistant gas addition, one could improve the process capability significantly. Design of experiment was applied to investigating the effects of source power, bias power and total pressure on CD uniformity, Micro-loading, Linearity and Process bias. With the DOE results, the process conditions could be fine-tuned to an optimal set of variables, which allow us to manufacture 0.13 micrometers masks.

The selectivity and etched profile of MoSiON in high-density CF₄/O₂/He inductively coupled plasma (ICP) have been studied. The etched profiles of MoSiON along with the quartz surface morphologies were investigated as a function of etching parameters by scanning electron microscopy (SEM). We varied pressure from 5 mtorr to 20 mtorr and CF₄ flow rate from 15 sccm to 40 sccm. A smooth quartz surface and a vertical MoSiON slope were observed under 10 sccm CF₄, 15 sccm of O₂ flow rate, -240 V of DC bias and 5 mtorr pressure. And the other conditions showed rough quartz surface and bad MoSiON slope. Only at the appropriate CF₄/O₂ Flow rate, high vapor pressure compounds inhibits nonuniform quartz etching.

Recently dry etcher system is a key process technology in preparation of photomask for next generation microelectronic device and endpoint detection system is an important part of the dry etch process, because mask CD control of Cr mask is more critical issues than before. In this paper, we describe real time endpoint system which is operated by optical emission multiple wavelength absorption for dry etch process of binary photomask. The end point detection system absorbs optical emission signal in real time, using optical cable from plasm chamber in dry etcher, and the signal is absorbed 200-800nm wavelength for a lot of grating manufactured by etch angel. The signal detects endpoint of process by association of one or several wavelength. We have tested newly developed EPD system and installed at PKLs dry etcher system, using various open area Cr mask with ZEP70000 resist. This study showed that multiple wavelength absorption technique is enough to detect endpoint down to 2 percent Cr loading masks and the EPD signal reproducibility was within 2 percent of EPD time at the same patterned masks.

Photo mask etching for the 100nm technology node places new requirements on dry etching processes. As the minimum-size features on the mask, such as assist bars and optical proximity correction (OPC) patterns, shrink down to 100nm, it is necessary to produce etch CD biases of below 20nm in order to reproduce minimum resist features into chrome with good pattern fidelity. In addition, vertical profiles are necessary. In previous generations of photomask technology, footing and sidewall profile slope were tolerated, since this dry etch profile was an improvement from wet etching. However, as feature sizes shrink, it is extremely important to select etch processes which do not generate a foot, because this will affect etch linearity and also limit the smallest etched feature size. Chemically amplified resist (CAR) from TOK is patterned with a 50keV MEBES eXara e-beam writer, allowing for patterning of small features with vertical resist profiles. This resist is developed for raster scan 50 kV e-beam systems. It has high contrast, good coating characteristics, good dry etch selectivity, and high environmental stability. Chrome etch process development has been performed using Design of Experiments to optimize parameters such as sidewall profile, etch CD bias, etch CD linearity for varying sizes of line/space patterns, etch CD linearity for varying sizes of isolated lines and spaces, loading effects, and application to contact etching.

Usually in photomask manufacturing, photoresists are stripped by wet processes using amineous solvents or acids. However, new photoresists and novel polymer-rich plasma etch processes in photomask manufacturing require new resist and polymer stripping techniques. The use of plasma strip processes strongly improves the stripping capability. One simple and economic solution is the microwave type reactor using oxygen plasma. As the chromium oxide antireflective coating (ARC) layer is etched in pure oxygen microwave plasma, the stripping plasma chemistry has to be modified to maintain sufficiently high selectivity towards chromium oxide. In this work a stripping process was optimized with respect to photoresist-to-chrome oxide selectivity and photoresist etch rate. The effect of the strip process on CD performance of the mask and integrity of the chromium oxide antireflective coating were investigated. Finally an endpoint detection solution was developed to optimize throughput. The described plasma stripping process proved to be fully applicable to photomask manufacturing.

The shrinkage of semiconductor devices creates demand for micronization in the photolithographic process. As a result, problems are arising in photolithography in the semiconductor manufacturing process. Focus latitude in photolithography becomes smaller as micronization advances and therefore the flatness of the mask can no longer be ignored. In this work, we clarified what the specification of mask flatness should be from the standpoint of its warpage in vacuum chucking of an exposure tool. A two-dimensional approach was applied for the prediction of mask surface after chucking. The approach is simple analytical calculation distinguishing between x-direction and y-direction. Warpage of mask surface after chucking has two modes depending on the directions. One is leverage caused by interaction of mask surface and chucking stage. Another one is warpage along chucking stage surface. The prediction shows good agreement with the actual surface of chucked mask. From this study, a new concept of the specification for mask blank flatness was proposed, taking warpage in vacuum chuck into consideration in the prediction. The proposed specification certainly can exclude masks that show large deformation after chucking even though with good free-standing flatness.

Liquid crystal display (LCD) in place of the conventional reticles for optical projection lithography is proposed, in order to minimize the turn-around-time and production cost. The transmittance ratio between the two modes of the LCD, such as transparent and opaque ones, is approximately a several dozen depending on the wave length of the light source. In this study, the Nikon g-line stepper was modified to apply the LCD on its reticle stage. The minimum resolution of this proposal projection system is quite similar to the one of the conventional reticle method. The exposure time is approximately 10 times longer compared to the conventional method. It has been proven that the LCD has the potential to be replaced for the conventional reticles in the optical stepper lithography that is applicable for devices with relatively large fabrication rules and low production amount.

The extension of KrF lithography has become the major trend in semiconductor manufacturing due to the delay of ArF lithography. Therefore, various resolution enhancement techniques (RETS) are employed for sub 100nm node patterning. This paper introduces the 100 percent transmission PSM as a candidate for resolving the problems with previous approaches using a transparent phase-shift mask. CLM shows a high optical performance and relatively simple mask fabrication compare to other strong phase-shift mask. However, full-chip level CLM application is still under development due to the difficulty of mask manufacturing and lack of proper layout converting environment. In this paper, we covered mask-making process such as the quartz dry etch and defect engineering which are critical to CLM manufacturing. We made a test mask based on the basic CLM concept and evaluated its optical performance. Finally, we will show the feasibility of chrome-less mask manufacturing for real device application.

Semiconductor industry still inspect reticle with the i-line wavelength and ITRS indicates only minimum defect size corresponds to 20 percent of the pattern size on mask in the same light. Currently defect definition, however, varies from the fixed minimum defect size to non-printable-maximum defect size due to increased reticle cost. This paper provides an investigation of requirements of current inspection system 193nm lithography. The lines and contact holes patterns were also investigated by both simulation and experiment. The printability of defects was observed under the various circumstances such as pitch variation and transmission of halftone film. From the defect printability study we found that defect printability behave non-linearly as the exposure condition varies and the size defect should be treated importantly as the ArF lithography extends till 70nm era. It is also understood that there is a possibility to miss the important meaning of the size defects from the simple definition of reticle defect. From the analysis of various types of defects and exposure conditions we suggested detail level of inspection sensitivity that new reticle inspection system should be ready.

Mask inspection has become a much more important factor in LSI manufacturing. In order to perform mask inspection with high reliability for devices of 100-130 nm rule and below, a high-resolution and high-speed die-to-database inspection system is indispensable. In order to satisfy these requirements, the Toshiba MC-3500, a next-generation mask inspection system using 257nm DUV short wavelength optics, has been developed. The MC-3500 employs a die-to-database comparison method and a high-performance data processing system that is newly developed. This paper reports the system configuration, basic characteristics for defect detection and inspection performance.

The defect detection capability for a minute pinhole by a newly developed mask inspection system MC-3500 with DUV reflected light source is reported. The detection sensitivity of a minute pinhole less than 180 nm on a KrF phase shift mask (PSM) with transmitted light source is limited because the pinhole signal intensity is influenced by the diffraction light. The signal intensity of the pinhole both by the reflected light source and transmitted light source was calculated by an optical simulator, and the actual pinhole signal of the KrF PSM and that of the ArF PSM were measured using the MC-3500 with reflected light source. It was found that the 100 nm minute pinhole, which was not detected by the inspection with the transmitted light source, was detected by the inspection with the reflected light source. This shows the effectiveness of the reflective inspection, thus proved that the newly developed MC-3500 inspection system with reflective inspection capability has very high defect detection sensitivity for the advanced masks of 100-130 nm rule and below devices.

The TeraStar family of reticle inspection systems were introduced in 2000 with die-to-die and STARlightT capability. These tools set the standard for high-resolution reticle inspection for the 130 nm design rule and below. The latest addition to the TeraStar family is the TeraStar SLF77, which extends the tool platform to include die-to-database inspection capability. Sensitivity for Chrome on Glass is 100 nm with much greater tolerance for inspecting aggressive OPC features such as serifs and assist lines. Many advanced reticles that are not inspectable on previous generation inspection tools are all inspectable on the TeraStar SLF77. Data prep times and file structure have been significantly improved with the average prep time being less than 10 percent of the 365UV-HR and average output file size less than 25 percent of the GigaPrep. The TeraStar SLF77 incorporates all the features of the TeraStar family such as triple-beam optics and TeraPro HP High Productivity Modes with the ability to run STARlight inspections concurrently with either die-to-die or die-to-database pattern inspections. Advanced registration algorithms accommodate subtle plate and machine errors to provide high sensitivity with low false detections. Advanced image overlay inspects small lines and OPC features and is very independent of defect shape and location. The TeraStar SLF77 has removed the barriers that existed with previous generation database inspection tools and made advanced reticle die-to-database inspection cost effective. Last October, KLA-Tencor introduced the TeraStar SLF77 and the three beta sites have recently completed beta evaluation. Here we present the first results from the use of the TeraStar in a production environment triple beam die-to-database inspection system. We have also shipped more than ten systems to customers worldwide. This paper describes the implementation of productivity improvements at the beta sites, performance on 130nm node customer product reticles, and KLA-Tencor's continued development on advanced inspection reticles.

Manufacturing technology in the photomask process is critical for building devices of today's specifications. However, when building masks for equipment suppliers, it is necessary to provide capability at least two years in advance of current requirements. Of particular interest are masks used to characterize and benchmark inspection tools. This paper demonstrates and compares the mask processing capabilities of 50keV e-beam writing platforms in the effort to build a new inspection test mask pattern. Both standard and OPC patterns will be examined to understand the impact of each to the mask manufacturer. In addition to 50keV e- beam platforms, complementary high-end process and metrology tools will be utilized and reported.

With constant push for smaller and faster devices photo mask technology has become the most critical part of the entire integrated circuit (IC) production flow. Mask inspection and mask defect repair are increasingly important components of advanced photo mask technology. The low cost of mask manufacturing and the necessity of delivering photo masks to production floor in the shortest possible time require new photo mask specs and acceptance criteria. It is no longer economically viable to reject a photo mask because some mask anomalies were found, or repair all the defects detected by state of the art inspection tool. One should use a smart approach to separate tolerable mask anomalies from real mask defects that might negatively affect device yield. However, this is not a trivial task. With rising mask complexity (e.g., binary masks with aggressive optical proximity correction or phase-shifting masks (PSM)-attenuated and alternating) and inspection and metrology tools running out of steam, new technologies such as the AIMS^TMand Virtual Stepper® system must be used to sort nuisance mask defects from real ones. This will help to reduce the number of required defect repairs and shorten mask manufacturing cycle time. However, it is very difficult to utilize AIMS in the production environment because of its low operational speed; the Virtual Stepper software, in its turn, relies on mask data captured by inspection/metrology hardware. In the case of phase masks, such as Attenuated PSM (especially high transmission EAPSM) and Alternating PSM, inspection tools are not able to accurately retrieve optical properties of mask materials; as a result defect analysis is becoming very difficult and unreliable task. Very common types of PSM defects that occur during mask manufacturing and repair processes are the so-called distributed defects, such as gallium stains, riverbeds, pinhole clusters, and large chrome residuals (on EAPSM). It is very difficult to get accurate information about the transmittance and phase of these defects at actinic wavelength using inspection and metrology tools. With a simulation study one can reconstruct such mask defects, and by varying defect phase and transmission one can learn about the impact of such mask defects on printed wafers. In addition, lithography simulation helps to better understand how mask defects behave under different lithography process conditions. In our previous research on photo mask distributed defects (this work was presented at 18th European mask conference, Munich 20021) we looked into several cases of distributed mask defects such as large chrome residuals and clustered pinholes on EAPSM. We found a relationship between photo mask defect transmissivity and resulting printed wafer critical dimension (CD) error.CD variations (systematic and random mask CD errors) across the photo mask represent a common type of yield killing distributed defects. Systematic errors can be analyzed and fixed by applying different corrective methods (e.g. LPC, OPC). The negative effect of random errors can be minimized by selecting the most robust manufacturing process, and by choosing optimal lithography options (RETs). In this paper we investigated randomly distributed CD errors. Monte Carlo simulation has been used to emulate large numbers (10000 - 40000) of mask random CD errors.

As photolithography is moving forwards to finer resolution, mask-making requirements also becomes much more stringent than before so as to compensate the gradually compressed process window on wafer. IN addition to requiring tighter CD specification , the defect disposition on mask is the most controversial issue needed to address by mask makers. As everybody knows, the defect problems are always the argument points after shipping between mask houses and wafer fabs. And the defect specifications defined by defect size are also no longer effective under complex environments of aggressive OPC features. To face the challenge under this environment many mask makers and mask users are turning to simulation-based photomask qualification. Comparing with hardware-based AIMS measurement, Virtual Stepper System (VSS) easy operation and flexibility become more attractive for users. How to apply the VSS into the production line becomes an emerging issue for mask makers and mask users. In general, mask-houses to keep the production line having satisfied inspection capability and cost-efficient. Although VSS can be completely connected with the sate-of-the-art tools from different companies, the simulation accuracy still needs to be evaluated to unify the criterion of defect judgement. Because VSS makes the simulation according to the captured mask image, the simulation results are strongly dependent on the quality of the providing images. Mix-and- match verification on VSS simulation between different inspection systems has been done in this study to give a reasonable criterion for simulation-based photomask qualification.

At the 100nm technology node, mask level CDs are typically 400nm with assist features and OPC serifs below 160nm. These design rules represent a severe challenge to conventional optical metrology. The use of any method of measurement, which is not representative of the way the pattern information is transmitted from the mask to the wafer, can lead to measurements that do not correlate directly with those at the wafer (excluding MEEF, magnification factors, lens distortion etc.) The most representative tool for Photomask CD metrology would perhaps be an actinic transmitted light tool. This ideal tool however, may not yet be available. When using alternative non-transmitted measurement, higher resolution is only part of the solution. Matching, calibration and sample interaction must also be considered. This paper discusses the relative merits of optical and non-optical metrology. Multiple, feature specific, gauge R&R studies are used to demonstrate the capability indices, for the Leica LWM250DUV (248nm), at each technology node. Furthermore, the specific application of the optical tool in the measurement of 'assisted' chrome lines, at the 100nm technology node, is demonstrated. The methodology employed includes optical/CDSEM calibration and correlation. Tool specific considerations necessary to achieve a stable and reliable match are detailed

There are several different methods for printing contact holes on wafers using optical lithography. A preferred resolution enhancement technique for improved contact hole lithography performance is the embedded attenuated phase shift mask (EAPSM). The EAPSM comes in many flavors and forms, but the current preferred form is a film transmission of 6 percent and a phase shift of 180 degrees relative to the clear fused silica areas. It is important to note that the phase shift and transmission values for the phase shift mask are at the actinic exposure wavelength of the wafer stepper/scanner. That is the mask is designed to have a transmission of 6 percent and phase shift of 180-degrees at 248nm or 193nm, depending on the wafer stepper. The resulting transmission of the phase shift mask at the inspection tool wavelength of 365nm is much higher, and the phase shift of the 365nm radiation is significantly less than at the shorter actinic wavelength. The gray-scaled aerial images that are collected by the mask inspection tool could vary significantly for the same size 2-D feature in the binary mask, the 248nm EAPSM, and the 193nm EAPSM. This is also compounded by the fact that the inspection tool calibrates the background transmission of the phase shift material as 0 percent transmission and calibrates the transmission of the fused silica as 100 percent transmission. When these gray-scaled images are used in an energy flux algorithm for contact area measurement, they can be potentially different for each of the three types of masks used to print contact holes. This paper explores the issues involved in using an off-actinic aerial image as the basis for the AVI method of contact sizing.

A method of PSM cleaning has been developed and its cleaning performance was studied by changing H₂SO₄ / H₂O₂ mixture(SPM) and diluted standard cleaning-1 (SC-1) chemical ratio and controlling phase and transmittance of KrF HT PSM, within ±3° and ±0.3 percent respectively. The type of residue was scrutinized using KLA-Tencor SL3UV and scanning electron microscopy (SEM) during stepwise process and cleaning. X-ray photoelectron spectroscopy (XPS) was also employed to characterize the residues on the HT PSM surface. Diluted HF (DHF) and DHF/H₂O₂ mixture (FPM) were introduced to etch off the remaining defects on quartz after MoSiON dry etch process and also compared their results with the gas assisted etching (GAE) repair. It has turned out that DHF, FPM and GAE repair removed the remaining defects on quartz respectively. Our results demonstrate that approach of stepwise process inspection is very effective at identifying defects and their sources as they become evident at different process steps. Finally it was shown that diluted SC-1 with quick dump method followed by the direct displacement IPA dry is promising for the improvement of HT PSM cleaning efficiency and its residual impurities and causes no damage on the MoSiON surface. It is found that efficient and effective conventional chemical treatment, direct displacement IPA dry and GAE repair would be considered to be the integrated sequence to control the smallest particles for the HT PSM.

Projection photolithography at 157 nm is now under research as a possible extension of current 248 nm and planned 193 nm technologies .We have found that a thin-film fused silica glass pellicle would be available to 157nm lithography because of its high durability to F2 laser irradiation . In this paper, we present the performance of the hard pellicle made of AQF. Transmission is 97.6 percent when AR films are coated on both surfaces, and its uniformity at 157.6 nm is better than +/- 0.2 percent, and birefringence is within 1 nm. We developed a new evaluation system of a hard pellicle bending in horizontal position and in vertical position. We achieved less than 1um sagging with 800um thickness membrane and glass frame made of modified fused silica in horizontal position.

Lithography registration errors induced by the attachment of soft pellicles on reticles can significantly affect wafer overlay performance for sub-100 nm lithography chip manufacturing. Intel Corporation and the University of Wisconsin have conducted an extensive study to identify the various sources of pellicle-induced distortions and methods for error reduction in order to meet advanced mask manufacturing requirements. In this study, pellicle attachment processes and system materials were evaluated to determine the effects on image placement accuracy. In particular, the in-plane distortions due to the pellicle attachment technique, pellicle frame flatness, frame adhesive, and environmental temperature were characterized. At Intel, pellicles were attached to a test reticle with a 21 X 21 array of grid points. Registration measurements were conducted before and after pellicle attachment using an optical distance metrology system. A comprehensive finite element model was developed at the University of Wisconsin to assess the contributions to pellicle-induced distortions from individual components of the pellicle system. Pellicle frame flatness, frame adhesive, and temperatures were measured and used as input to the finite element model. The correlation between simulation results and experimental data was excellent. Analyses were also performed to study pellicle mounting mechanisms and pellicle frame flatness.

A comprehensive design of experiment was elaborated to evaluate the effects of frame flatness, mask adhesive compliance, and mounting load on pellicle-induced distortions for soft pellicle systems. A dynamic mechanical analyzer was used to determine the elastic modulus of the adhesives materials, and a capacitive sensor-based tool was employed to measure the pellicle frame bow prior to mounting. Registration measurements were conducted on test reticles on a 21 X 21 array of grid points, before and after pellicle attachment. Statistical analysis (Anova test) was conducted to determine if the means for each sample group were statistically discernable. Overall, the magnitude of the distortions was very low for the pellicle mounting mechanism selected. Nevertheless the results indicated that the sample group with the flexible (softer) mask adhesive material exhibited lower distortions than that with conventional (stiffer) mask adhesive. Either larger sample size and/or wider variations in initial frame bow and mounting pressure will be required to assess the impact of these parameters on pellicle-induced distortions. Flexible (softer) mask adhesives are believed to minimize photomask deformation during the mounting process, resulting in lower pellicle-induced distortions.

In this paper, we demonstrate new simulation capabilities for defect dispositioning of alternating aperture phase shift masks (AAPSM). A defect mask for use in a 248 nm exposure tool was fabricated with programmed phase defects. Inspection images of the defects were taken on Lasertec's MD3000 and KLA-Tencor's SLF27 inspection systems. The simulation tool takes defect images as input and simulates photolithography performance via aerial image modeling. We present preliminary modeling results that show good agreement between simulated CDs and the CDs from Aerial Image Measurement System (AIMSTM) measurements. This work shows the potential for extending Virtual Stepper?System to AAPSMs on a variety of inspection platforms.

In this paper, the simulation of wafer images for Alternating Aperture Phase Shift Masks is addressed by comparing wafer printing image with simulation. This is the first accuracy study for Virtual Stepper's newly developed AAPSM simulation module. The test reticle used includes 70 nm gate structures with three types of programmed phase defects: edge, corner, and center defects on rectangular shifter patterns. Wafer exposures are performed using 193 nm imaging technology and inspection images generated on a KLA-Tencor's SLF27 system. These images are used by the Virtual Stepper System to provide simulated wafer images using the specified stepper parameters. The results are compared to the simulation results from the Aerial Image Measurement System (AIMSTM) and SEM images of resist patterns.

An alternative phase shift mask (alt-PSM) is a promising device for extending optical lithography to finer design rules. There have been few reports, however, on the mask's ability to identify phase defects. We report here an alt-PSM of a single-trench type with undercut for ArF exposure, with programmed phase defects used to evaluate defect printability by measuring aerial images with a Zeiss MSM193 measuring system. The experimental results are simulated using the TEMPEST program. First, a critical comparison of the simulation and the experiment is conducted. The actual measured topographies of quartz defects are used in the simulation. Moreover, a general simulation study on defect printability using an alt-PSM for ArF exposure is conducted. The defect dimensions, which produce critical CD errors, are determined by simulation that takes into account the full 3-dimensional structure of phase defects as well as a simplified structure. The critical dimensions of an isolated bump defect identified by the alt-PSM of a single-trench type with undercut for ArF exposure are 300 nm in bottom dimension and 74 degrees in height (phase) for the real shape, where the depth of wet-etching is 100 nm and the CD error limit is +/- 5 percent.

A systematic attempt has been undertaken to investigate the printability of mask defects for 100nm lithography using 193nm wavelength. The main purpose is the study of soft defects (particles), which are mimic-ed by programmed resist dots. We report on the impact of defects additive to the Cr line, within the size range of 60nm to 260nm, at reticle level. Printability of different phase and transmission defects is first assessed by simulation, using PROLITH v7.0. Also the influence of the defect area, its location, and its shape is investigated. Printing experiments are performed using QUASARTM and annular illumination, the preferred settings in combination with a binary reticle. We demonstrate that aerial image simulations and AIMS measurements can predict the qualitative trends in defect printability. A thorough quantitative correlation between printing, simulation and AIMS evaluation is presented.

Simulated wafer images for Attenuated Phase Shift Mask (ATTPSM) features are performed by the Virtual Stepper System. The ATTPSM test reticles were prepared with programmed defects (hard defects and phase defects) on line/space patterns, contact hole patterns, and rectangle patterns for 150-nm design rules. Each defect area was inspected using KLA-Tencor's UV-HR365 and SLF27 inspection systems. Virtual Stepper simulations are compared with Aerial Image Measurement System (AIMSTM) simulation at best focus and at multiple defocus levels. In addition, simulation accuracy from different inspection images is compared.

Currently, the wafer design rule is being reduced, and 130-100nm Lithography process development being accelerated. The specification of the mask quality assurance for 130-100nm lithography is about in the process of being fixed. It is commonly said that a 150nm Pixel grid is small enough for 130nm generation mask inspection. But We don't yet have verification results concerning whether the spec is adequate enough or not. This time, we had an experiment that at mask incoming inspection, KLA detect as repeating defect even through the mask shop inspection. We feed back this results to mask shop, and find out the route cause. Then we establish the assurance method for current and next generation mask inspection. We realized that the current mask inspection spec for each generation might not be adequate enough.

Alternating phase-shifting mask (Alt-PSM) has been often viewed as one of the most practical techniques for 100nm-and-below node lithography. Among the various mask structures of the Alt-PSMs, the 'single trench with undercut structure', which has a phase shifting trench with side- etching, has been in frequent use of 130nm-node KrF lithography. It is because this structure has good optical characteristics, and it has some advantages in productivity compared with other mask structures. However, when the 'single trench with undercut' type Alt-PSM is applied to the 100nm-and-below node ArF lithography, the narrow chrome line width restricts the undercut width and limits the lithographic performance. Therefore a new structure is required.

In optical lithography balancing the aerial image of an alternating phase shifting mask (alt. PSM) is a major challenge. For the exposure wavelengths (currently 248nm and 193nm) an optimum etching method is necessary to overcome imbalance effects. Defects play an important role in the imbalances of the aerial image. In this contribution defects will be discussed by using the methodology of global phase imbalance control also for local imbalances which are a result of quartz defects. The effective phase error can be determined with an AIMS-system by measuring the CD width between the images of deep- and shallow trenches at different focus settings. The AIMS results are analyzed in comparison to the simulated and lithographic print results of the alternating structures. For the analysis of local aerial image imbalances it is necessary to investigate the capability of detecting these phase defects with state of the art inspection systems. Alternating PSMs containing programmed defects were inspected with different algorithms to investigate the capture rate of special phase defects in dependence on the defect size. Besides inspection also repair of phase defects is an important task. In this contribution we show the effect of repair on the optical behavior of phase defects. Due to the limited accuracy of the repair tools the repaired area still shows a certain local phase error. This error can be caused either by residual quartz material or a substrate damage. The influence of such repair induced phase errors on the aerial image were investigated.

Chromeless Phase Lithography (CPL) with a high NA exposure tool is shown to be an attractive technology solution for the 65nm node. Under strong image enhancement conditions, the traditional definition of minimum defect printability specifications is no longer adequate. This paper investigates defect printability issues for CPL technology. Based on optimized scattering bar OPC treatments through pitch, a set of defect printability quantification (DPQ) patterns was designed. In the DPQ design, a number of defect types have been programmed with progressively increasing defect size from 0.05(l/NA) to 0.3(l/NA). Each defect type and size on the actual CPL reticle were then fully characterized using an advanced CD SEM metrology system, the KLA8450RT with both wafer and reticle capabilities. This is a very critical step for quantifying defect printability, since in order to accurately assess the printability, the defect dimension must be well correlated to the original DPQ design on the reticle. The DPQ reticle was then printed using a high numerical aperture (NA) scanner (ASML /850T) so that it is possible to characterize the defect printability for each of the programmed defects and the impact on CD through pitch. Minimum printable defect (MPD), maximum non-printable defect (MNPD), and critical dimension (CD) variation percentage were used as metrics to characterize the critical defect size and the sensitivity of each defect type. The purpose of this study is to understand the tolerance of the CLM technology to printable defects and establish a realistic and sensible defect specification.

AlSi-based films could be formed by a combination of transparent chemical compositions and absorbing elements. When the oxide structure increased with the increasing of atomic percentage of oxygen, the n of AlSixOy appeared to increase while k appeared to decrease in 193 nm. The saturation of formation of AlN and Si₃N₄ in AlSixNy was observed about 4.8 sccm N₂ flow rate. The correlation between optical properties and chemical compositions of AlSi-based films has been described, therefore, the chemical stability of embedded material could be approached. Top layer film with saturation of AlN, Si₃N₄ or Al₂O₃, SiO₂ could provide better chemical stability. Bottom layer with suitable mount of Al and Si chemical structure could provide enough light absorption. With proper combination of top and bottom layer AlSixOy and AlSixNy embedded material, the optical properties of bi-layer attenuated phase-shifting mask could kept in the range of high transmittance. The 0.18-micrometers -line/space NEB-22 resist pattern exposed by e-beam writer on AlSixOy embedded layer has good resolution. Due to good resist profile, the 0.3-micrometers -line/space etched pattern of bi-layer AlSixOy was also successfully carried out.

Compared to normal transmittance attenuated phase-shifting mask (AttPSM), the higher transmittance AttPSM in clear-field masks has higher electric field amplitude with 180 degrees phase-shift for 0.1 micrometers isolated line. Due to the stronger interference with the higher electric field amplitude under the edge of line pattern with 180 degrees phase-shifting, the resolution of aerial image of 0.1 micrometers isolated line increased with the increasing of transmittance. Under dipole illumination (sigma) _c 0.6 and (sigma) _r 0.3, and NA 0.75, the T percent of AttPSM about 22 percent could provide the better normalized image log-slope of 0.1 micrometers isolated and semi-dense line pattern at focus -0.10 micrometers . When the layout of the 0.1 micrometers pitch and isolated contact pattern is designed as a dark-tone mask, the contrast of the aerial image increased with increasing T percent of AttPSM. The side-lobe could be avoided under the design of dark-tone mask. However, if the contact pattern is designed as a dark-tone mask, a negative resist is necessary. The combination of dark-tone mask, high-transmittance AttPSM and negative resist could provide better contrast of the aerial image and resolution of the 0.1 micrometers contact-hole pattern in 193 nm lithography.

The model-based OPC is considered in 0.13um and beyond generation. However, the accuracy of model-based OPC is based on the measurement of test patterns on bare silicon wafers using the optimized exposure condition. The through pitch patterns and systematic patterns should be contained in the test patterns design. Experiments showed that the accuracy of model would be constrained if the underlying pattern effects would not be considered. The CD performance at the defocus and process window would also suffer since not considering the underlying pattern effects. This CD performance at defocus level and process window will be worse at damascene process. In this paper, we propose a hybrid OPC to cover these issues. In this work, we can use a simple method to investigate the underlying impact on the target layer on which we want to implement OPC to improve the pattern fidelity. We can observe the impact of underlying layer by studying the CD of critical patterns at de-focus level. This experiment provides us the CD data for considering the underlying impact without relying on theoretical foundation. With the hybrid OPC, we can find the exposure latitude has been improved

We develop a Mask Process Correction (MPC) set of tools in collaboration with DuPont Photomasks, Mentor Graphics and CEA-LETI. The MPC project consists of 3 modules.

The extreme ultraviolet lithography (EUVL) mask differs from its predecessors in many ways. The most significant change is that the EUVL mask is reflective, introducing many new film layers and mask sensitivities. An additional complication is the small linewidths associated with the 45-nm node that is targeted for EUVL mask introduction. This paper concentrates on the physical specifications associated with the 45-nm node EUVL mask. Relative to current masks, the defect levels must be lower and the film quality must be higher. Standard cleans may be incompatible with new mask requirements. To understand the development requirements, the cleaning efficiency, film removal, film roughness, defect levels and film reflectivity are quantified on both EUVL mask film monitors and EUVL masks. Target specifications and measured properties of the 45-nm node masks will be compared.

Extreme UVL (EUVL) is expected to meet the manufacturing lithography requirements of the 45 nm node and below. The manufacturer of 45 nm EUVL reticles will require advancement in both traditional mask production capabilities as well as requirements uniquely related to EUVL reticles. Photonics is actively pursuing EUVL reticle capability along two paths. First, the NGL Mask Center of Competency (MCoC) has been developing mask technology to support proximity x-ray, electron projection lithography (EPL) and EUVL for several years. The MCoC has applied high resolution lithography and pattern transfer processes developed for 125 nm and below 1X processes to 4X EUVL masks. In addition, the McoC is collaboration with suppliers on the development of low defect mask blanks and inspection techniques as well as developing low temperature chemically amplified resist processes and low stress materials deposition and processing specifically for EUVL mask fabrication. Key process technology including high resolution vector scan EB lithography and chemically amplified resist processes and has been transferred from the MCoC to manufacturing sites. Secondly, as a natural extension of the optical reticle product line, EUVL reticles will benefit from current and continued mask manufacturing development. Vector scan e-beam lithography with chemically amplified resists will be used at both the Photonics MCoC and manufacturing facilities to improve resolution and productivity for sub 100 nm reticle production.

The effect of variations in the thickness of the multilayer of a mask blank on pattern printability was examined. The multilayer was assumed to consists of 40 Si/Mo bilayers. For a given total thickness, variations in the thicknesses of the individual SI and Mo monolayers produce such a small loss in reflectance that printability remains good for both binary and attenuated phase-shifting masks, even when such variations exist. On the other hand, variations in the total thickness shift the peak of the reflectance spectrum, which degrades the reflectance on a wafer. In this case, printability for a binary mask is determined simply by the reflectance loss on a wafer, while printability for an attenuated PSM is strongly influenced by variations in total thickness because they change the phase and attenuated reflectance.

Rigorous modeling of diffraction from the mask is one of the most critical points in the extension of lithography simulation from its traditional spectral range between 150 and 500 nm into the area of extreme ultraviolet (EUV) between 10 and 15 nm. A typical EUV mask is made of a reflective multilayer (Mo/Si or Mo/Be for example) deposited on a substrate. Above the multilayer, a buffer layer acts as an etch stopper, and an absorber is used for the mask pattern. If we limit our scope to layers without defect, most of the mask parts can actually be described by analytical methods such as transfer matrices. Therefore we decided to split the mask into two parts : the first part includes the absorber and the buffer layer and it will be studied using a finite-difference time-domain (FDTD) algorithm, the second part includes the reflective multilayer and the substrate and it will be simply described by transfer matrices.

Electron-beam projection lithography (EPL) using stencil mask is one of the most promising candidates for next- generation lithography. However, the practical use of a stencil mask for fabricating ULSIs needs proximity effect correction (PEC) as well as complementary data to be prepared in order to solve the 'doughnut pattern problem'. We have developed a method for generating complementary data by using a pattern operation tool for design-rule checking and phase-shift-mask generation. The advantages of using these commercial DA tools war high processing speed as a result of maintenance of a hierarchical data structure, high reliability, and flexibility to allow the generation rules to be changed. Since beam blue, which varies according to pattern density in a sub-field, has to be estimated in PEC, sub-field division has to be performed prior to PEC. In the developed method, sub-field division is performed after the complementary-data generation. Sub-field division makes the chip dat almost flatten and enlarge the output data volume. If the sub-field division is performed prior to complementary decomposition, complementary-data generation cannot take advantage of high-speed processing resulting from the maintenance of a hierarchical data structure. We applied this method for metal layer dat of a 14 X 14-mm test chip that includes 300 million figures in flat form. For the complementary-data generation by the developed method CPU time was about 20 minutes using a 500-MHz PC with a 256-Mbyte memory. Maintenance of the hierarchical data structure made the volume of output GDSII data compact. The method can equalize the aperture densities of two complementary mask in a Coulomb-interaction range that is smaller than a sub-field. Although sub-field division using a DRC tool expands the output data volume in GDSII format, sub-field division using EB pattern data generator reduces output data in realistic size.

In EPL, one of the issues is how to reduce the critical dimension (CD) error observed at the boundary of two complementary patterns when being stitched together to form one smooth line. This paper is concerned about edge deformation of the two lines to reduce the CD error. Among several forms, a pair of concave- and convex-three-up-step edges was formed for 580-nm-wide lines with 75-nm-wide steps. Our choices of the shapes of deformed edges are presented based on the degree of difficulties of making fiber features on mask. The first choice is a pair of concave- and convex-one-step edges. Two EPL dat conversion systems, SX-GIGA/EPLON of Seiko Instruments Inc. and PATACON-6600 of Nippon Control System Corp., are introduced. They are found to automatically yield required stitching correction patterns. Their flexibility in stitching correction enough to cope with customers' requests makes them useful and practical.

The technological systematics for low-energy electron-beam proximity-projection lithography (LEEPL) is discussed with particular focuses on the key ingredients such as mask, resist and alignment. We have developed a mechanically rigid 1X stencil mask supported by a grid-work of struts, high-resolution chemically-amplified resists to be used for multi layer processes, and the accurate alignment method to overlay complementary split patterns. The LEEPL beta machine as combined with these techniques was successfully used to demonstrate its imaging capability for the 70 nm node.

We have been developing a practical mask-data processing system for low-energy electron-beam proximity-projection lithography (LEEPL), a promising candidate for the next generation lithography. Several problems inherent to the unique mask structure for LEEPL have been solved in principle. In this paper, the overview of the system is demonstrated, with special focus on the corrections for the possible violation of complementary splitting on the boundary of neighboring data-processing units as well as the image placement error due to mask distortion.

This paper introduces nanomachining with the RAVE LLC nm1300 as an effective alternative for subtractive mask repair on a variety of materials. Because the Rave LLC nm 1300 employs a nanomachining strategy for subtractive removals there is essentially no limitation on the types of materials that may be removed. This unique capability makes the RAVE LLC nm 1300 adaptable to performing repairs on EUV, carbon depositions, and contamination that cannot be removed by standard cleaning processes. EUV is widely regarded as the leading candidate for NGL, with beta systems scheduled for delivery in 2005. This technology still faces several critical challenges, some of which relate to defects and Cost of Ownership. In fact, in industry-wide projections, process defects are listed as one of the largest contributors to yield loss (and yield loss is one of the primary drivers of Cost of Ownership). Because the EUV technology utilizes a reflective mask, it presents several challenges to conventional mask repair techniques which to date have not been overcome. This paper introduces nanomachining with the RAVE LLC nm1300 as an effective alternative for subtractive mask repair of EUV mask defects. In addition, this paper will demonstrate how the Rave LLC nm 1300 nanomachining process can be utilized to repair masks that do not meet specification due to misplaced carbon depositions or 'non-removable' contamination covering critical geometries.

International SEMATECH has been a focal point for the 157nm effort worldwide. Since beginning the program in 1998, ISMT has provided forums for information dissemination ona semi- annual basis. The ability to develop a consensus to identify the most pressing critical issues has permitted the industry to develop this technology more rapidly than any other has been developed. There are still many issues that remain, but even the unexpected have been addressed and solutions put in place. There is a lesson to be learned that a concerted effort involving the entire industry can provide solutions to even the most difficult problems. The development is not completed, but the end is in sight. 157 nm lithography will be developed faster than any other technology due to the entire industry working in concert.

TaSiOx is expected to be the most effective film material for use in attenuated phase shifting masks (Att-PSMs), in terms of both its durability under irradiation and its lithographic performance in 157-nm lithography. In this study, we optimized the transmittance of 5.5 percent and evaluated the effectiveness of TaSiOx by both aerial image simulation and exposure experiment in order to evaluate the material's potential for 157 nm lithography. Through the aerial image simulation, it was confirmed that aerial image intensity of side lobes was less than half of that needed for resolving patterns by transmittance of 5.5 percent. In an exposure experiment, the resolution, depth of focus (DOF), and mask error enhancement factor (MEEF) were evaluated for hole patterns. The result of this evaluation was that we were able to fabricate a pattern of 100-nm diameter isolated holes without side lobes and obtain a better than 200-nm DOF and MEEF greater than three with a 5.5 percent TaSiOx type Att-PSM. This study has confirmed that TaSiOx type Att-PSMs have strong potential for application in the fabrication of 100-nm hole patterns by 157-nm lithography.

The problems of chromeless phase shift masks (CL-PSMs), which cannot fabricate large patterns, can be overcome by using CL-PSMs that have opaque chrome (Cr). This paper presents evaluation results for these enhanced CL-PSMs. We exposed with an ArF scanner of 0.60 numerical aperture with annular illumination and we used a positive chemically amplified ArF resist 0.21 μm thick. We did not use assist bars. For it was difficult to make assist bars which were smaller than sub-70-nm main patterns. We obtained good critical dimension controlled patterns with bias optical proximity correction. The mask error enhancement factors were about 1 for >300-nm pitch patterns. The resist pattern profiles were good. The depth of focus of isolated line patterns was about 0.3 μm. We could fabricate random logic patterns that had various pattern widths from 70 nm to more than 100 nm.

IDEALSmile is introduced as a new exposure technique that realizes k₁ equals 0.29. In this paper IDEALSmile is targeted for contact hole patterns (C/H). The results validate that it is possible to simultaneously expose not only k₁ equals 0.32 half-pitch dense and isolated C/H patterns, but also different pitches using Canon FPA- 5000ES3, which is impossible by conventional methods. Since these results are obtained using a binary mask and modified illumination with single exposure, there are no concerns with regards to a decease in throughput and an increase in cost of ownership. However, one of the issues in fabricating C/H patterns is the mask error enhancement factor (MEEF). Our simulation ha shown that IDEALSmile exhibits good MEEF. Although there are questions regarding optical microlithography for critical C/H patterning, the IDEALSmile exposure method has the potential to be the solution. By attaining k₁ equals 0.32, printing 100nm C/H patterns can be achieved with a single exposure using KrF lithography, such as the Canon FPA-5000ES4. Furthermore the IDEALSmile technique using ArF or F2 lithography will be effective for C/H patterns below the 100nm node. There is no doubt that optical microlithography will continue for some time.

A methodology for specifying mask quality named flexible mask specifications is proposed. The methodology consists of two major concepts. One is flexibly selected patterns to guarantee mask quality for each device and each level of devices using full-chip level lithography simulation. The other is flexibly changeable combination of each tolerance for each error component. The validity of flexible mask specifications is proved on masks of a 130nm node memory device. Using the flexible mask specifications, we have confirmed that mask manufacturing yield rise up by 20 percent on masks of a 175nm node memory device compared with the yield of the masks judged by conventional mask specifications.

Inspection and repair are increasingly more important components of the mask building process. Mask writing complexity and time make it necessary to accept plates containing defects such as line protrusions, particles, or voids. These defects are identified by a number of inspection tools, which should make it possible to distinguish between 'killer' and 'nuisance' defects. In the most advanced defect printability studies, a 10 percent linewidth (CD) variation in critical areas across process window are used to evaluate defect severity. This emphasizes defect printability for manufacturing rather than product functionality. In this work, we propose a simulation procedure that goes one step further towards product yield, by evaluating the impact of mask defects on device parameters. It first defines silicon image, followed by the identification of defects that actually degrade device characteristics beyond the limits specified for the product. The procedure involves simulated transistor characteristics based on its geometries and models, with drive and leakage currents used as the qualifying parameters.

The reduction of post-develop defects in photomask making is significantly more critical than in wafer processing. While wafers can afford to experience some level of defect density, photomasks are required to be defect free. Defect density learning in photomask making is expensive and time-consuming given the material and exposure time costs. In a wafer fab, it is much easier to run factorial experiments to get large amounts of data in a short amount of time. Some photomask making and wafer processing defect generation mechanisms are the same. Here a study of the formation of resist material residues during develop will be compared between photomask and wafer processing. Wafer processing experience will provide insight into photomask post-develop defect formation. Several options for the elimination of this defect type will be discussed. Differences in implementation strategies between photomask makers and wafer lithographers will also be discussed.

6-inch EUV masks consisting of Mo/Si multilayers and patterned CrX buffer and TaBN absorber layers have recently been developed and evaluated. Mo/Si multilayers with a relatively high EUV reflectivity of 66 percent and an excellent uniformity were obtained on the polished ULE substrates by an ion beam sputtering method. The multilayers showed high durability to the acid abased cleaning and baking at 150 degrees C used in the conventional mask-making process. The Cr based film was optimized as a repair buffer to obtain a high reflectivity of 52 percent at 257 nm and low stress within 100 MPa. TaBN absorbers with a low reflectivity were obtained by optimizing the film compositions, which resulted in a high image contrast to the multilayer for DUV inspection. An EUV contrast level of 99 percent was achieved for a thinner, 100-nm thick absorber stack. Using the optimized mask process, EUV mask with patterns of 180-nm width were successfully obtained, without a significant drop in EUV reflectivity.

The next generation lithography, either electron or photon based, will be first introduced on critical levels for device manufacture. These levels have different requirements for difficulty of meeting image size uniformity, image placement, and patterning requirements on masks. Membrane masks are needed for electron projection lithography (EPL), and the fabrication of membrane masks generates new requirements such as the need for complementary mask pairs for stencil masks. In this paper, we discuss experiments for fabricating EPL masks for device levels.

In order to solve the various problems associated with a LEEPL mask as originally demonstrated in the form of single-membrane diamond mask, we propose a new mask format termed COSMOS (complementary stencil mask on strut-supports). The COSMOS has small-area membranes with strut reinforcement and is somewhat similar to the masks used for other types of electron projection lithography (EPL). However, the exposure strategy is completely different from the other EPLs; a complete pattern image can be transcribed by overlaying complementary portions of a mask pattern via multiple exposures. The inter-membrane and intra-membrane distortions of image placement have been computed by the finite element method (FEM) simulation. It is concluded that the global distortion induced by the inversion of gravity can be corrected for by mask writing, and the intra-membrane distortion, induced by both the gravitational flexure of a membrane and the pattern density distribution, can be neglected with the membrane intrinsic stress of approximately 5 Mpa..

We have developed the EPL mask data conversion system EPLON. It provides comprehensive capabilities necessary for the data conversion of EPL masks. This paper presents the features of each function and the evaluation result of data conversion with actual data on a full chip level. The result shows that the whole data conversion is possible within reasonable time for huge data. We also propose a new format for describing EPL mask data to deal with the huge size of EPL mask data after conversion. The format is called the EPLM format and it contains one main file and multiple subfield files.

Identifying a functional pellicle solution for 157-nm lithography remains the most critical issue for mask technology. Developing a hard pellicle system has been a recent focus of study. Fabrication and potential pellicle-induced image placement errors present the highest challenges to the technology for meeting the stringent error budget for manufacturing devices in the 65-nm regime. This paper reports the results of a comprehensive proof-of-concept study on the state-of-art hard pellicle systems, which feature 800-mm thick modified fused silica pellicles and quartz frames. Pellicles were fabricated to ensure optical uniformity and flatness. Typical intrinsic warpage of these pellicles was close to the theoretical limit of 4.0 mm under a gravitational load. Quartz frames had bows less than 1.0 mm. The advantage of quartz frames with matched thermal expansion was demonstrated. An interferometric facility was developed to measure the flatness of the mask and pellicle system before and after pellicle mounting. Depending on the mounting process as well as mounting tool characteristics and techniques, variations were observed from pellicle to pellicle, mount to mount, and mask to mask. A redesign of the mounter and mounting process has significantly improved pellicle flatness. Finite element models were also generated to characterize the relative importance of the principal sources of pellicle-induced photomask distortions. Simulation results provide insightful guidance for improving image quality when employing a hard pellicle.

Following mask inspection, mask-defect classification is a process of reviewing and classifying each captured defect according to prior-defined printability rules. With the current hardware configuration in manufacturing environments, this review and classification process is a mandatory manual task. For cases with a relatively small number of captured defects, defect classification itself does not put too much burden to operators or engineers. With a moderate increase of defects, it would however, become a time-consuming process and prolong the total mask-making cycle time. Should too many nuisance defects be caught under a given detection sensitivity, engineers would generally loosed the detection sensitivity in order to reduce the number of nuisance defects. By doing that however, there exists potential threat of missing real defects. The present study describes a 'progressive self-learning' (PSL) algorithm for defect classification to relieve loading from operators or engineers and further accelerate defect review/classification process. Basically, the PSL algorithm involves with image extraction, digitization, alignment and matching. One key concept of this PSL algorithm is that there is not any pre-stored defect library in the first place of a particular run. In turn, a defect library is 'progressively' built during the initial stage of defect review and classification at each run. The merit of this design can be realized by its flexibility. An additional benefit is that all defect images are stored and suitable for network transfer. The C language is adopted to implement the present algorithm to avoid the porting issue, so as not bound to a particular machine. Assessment of the PSL algorithm is examined in terms of efficiency and the accurate rate.

With the approach of the 100nm-lithography node, an accurate and reliable method of measuring reticle pinhole defects becomes necessary to assess the capabilities of high-end reticle inspection equipment. The current measurement method of programmed defect pinholes consists of using a SEM. While this method is repeatable, it does not reliably represent the true nature of a pinhole. Earlier studies have suggested that since the SEM images only a top down view of the pinhole, the measurement does not accurately account for edge wall angle and partial filling which both reduce pinhole transmission and subsequent printability. Since wafer lithography and reticle inspection tools use transmitted illumination, pinhole detection performance based on SEM measurements is often erroneous. In this study, a pinhole test reticle was manufactured to further characterize the capabilities of a transmission method to measure pinholes.

With growing implementation of low k1 lithography on DUV scanners for wafer production, detecting and analyzing photomask critical dimension (CD) errors and semitransparent defects is vital for qualifying photomasks to enable high IC wafer yields for 130nm and 100nm nodes. Using the TeraStarTM pattern inspection system's image computer platform, a new algorithm, TeraFluxTM, has been implemented and tested for the inspection of small 'closed' features. The current algorithm is run in die-to-die mode and compares the energy flux differences on features between die for small closed features, such as, contacts, trenches, and cells on chrome and half-tone reticles. Tests show the new algorithm provides CD error detection to 5 percent energy flux variation with low false defect counts. The dispositioning of very small CD errors typically requires the precision and resolution of a CD-SEM. A new capability has been developed for review of very small CD errors for this application, which displays the energy flux difference between any corresponding closed features on different die. We have characterized the sensitivity and false defect performance of the new energy flux algorithm with production masks and programmed defect test masks. The program defect test mask contains two sets of contacts at 600nm and 800nm design sizes. At each design size there are six defect types in both dense and sparse geometry. The programmed defects are designed to have 1 percent energy increments for defect sizes from 1 percent to 10 percent, and 2 percent energy increments from 10 percent to 30 percent. A sampling of inspection results will be presented. SEM measurements were taken at programmed defect locations to develop a correlation between the energy flux difference and the measured CD.

This paper discusses the challenges to alternating phase shift mask defect inspection and new approaches for phase defect detection using multiple illumination methods in conjunction with defect detection algorithm modifications. Die-to-die inspection algorithms were developed for the KLA-Tencor 365UV-HR (APS algorithm) and TeraStar SLF27 (TeraPhase algorithm) inspection systems based upon the use of simultaneous transmitted and reflected light signals. The development of an AltPSM programmed test vehicle is described and defect sensitivity characterization results from programmed phase defect reticles are presented. A comparison of the two approaches used for the different inspection systems is discussed. A comparison of TeraPhase to transmitted light only results from a programmed phase defect test mask shows improved phase defect detection results.

For next generation photo mask lithography the tolerance range for pattern placement and critical dimensions (CD) is further shrinking. Improved optical resolution and precision of a metrology system are required to qualify the lithography tool and monitor the photo mask process. Edge detection methods in transmitted light mode for pattern placement and CD measurements are advantageous if the tightened resolution and precision requirements can be met. The new LMS IPRO2 using an illumination wavelength range of 360 to 410 nm has a significantly enhanced resolution for registration and CD measurements in both, transmitted and reflected light. A new laser interferometer with an enhanced resolution of 0.3 nm contributes to the overall improved system performance. The stage is designed to measure on quartz substrates and next generation lithography (NGL) reticles up to 230 mm square in transmitted light as well as in reflected light on 200 mm and 300 mm wafers for stepper qualification.

The imaging concept of electron projection lithography (EPL) with a silicon stencil reticle is explained. A silicon membrane thickness of 1-2 micrometers is suitable for the reticle. A scattering contrast of greater than 99 percent is expected. Nikon is developing EPL tool as EB stepper. Sub- field size is 0.25 mm square and deflection length is 5mm on wafer. The wafer is exposed with a sub-field by sub-field bias by the deflection control of the electron beam. The basic system configuration of EB stepper is introduced. Examples of error budgets of CD variations and Overlay/Stitching accuracy for 65nm technology node are shown. The latest data of electron optics and vacuum compatible stages for EB stepper are introduced. 70nm patterns are resolved in the entire sub-field. The status of infrastructure of technology related to EPL reticle and data post processing software are explained.

Controlling the critical dimension is central in mask manufacturing, and with the ever-shrinking design rule - and hence the increasing requirements on the mask fidelity - new and visionary ways of pushing the envelope of the critical dimension (CD), becomes essential. Research tools and off-line solutions for sizing, proximity correction and other CD compensations have been pursued for some time, but making efficient use of such technologies have been limited by ease-of-use, fracturing and computational time and data volumes associated. Here, we present techniques to deal with these challenges by taking the approach to integrate the solutions into a modern, real-time pattern generator datapath. The solution is based on hierarchical treatment of the patterns in the real-time data path of the pattern generator. By placing it in the real-time domain, we avoid the problem with exploding stream data volumes, and can exploit the parallel architecture and raw computational power of the data path engine.

Photomask complexity threatens to outpace mask pattern generator productivity, as semiconductor devices are scaled down and optical proximity correction (OPC) becomes commonplace. Raster scan architectures are well suited to the challenge of maintaining mask throughput and mask quality despite these trends. The MEBES eXara mask pattern generator combines the resolution of a finely focused 50 keV electron beam with the productivity and accuracy of Raster Graybeam writing. Features below 100 nm can be imaged, and OPC designs are produced with consistent fidelity. Write time is independent of resist sensitivity, allowing high-dose processes to be extended, and relaxing sensitivity constraints on chemically amplified resists. Data handling capability is enhanced by a new hierarchical front end and hiearchical data format, building on an underlying writing strategy that is efficient for OPC patterns. A large operating range enables the MEBES eXara system to support the production of 100 nm photomasks, and the development of 70 nm masks.

Electron beam lithography system JBX-9300FS has the specifications of high-resolution exposure down to 20nm line width and also of accuracy of 20nm field stitching and 25nm overlay for alignment exposure on wafer. In this paper we will introduce 100kV high voltage gun design, new functions of hardware and software and recent results of evaluation data of the system. It is expected that the high precision lithography with high accelerating fine beam by JBX-9300FS will greatly contribute to the use of not only direct writing for the development of next generation devices and the production of optical or communication devices but also the development and prototype production of new masks for Next Generation Lithography tools, such as x-ray, EUV, EPL, and LEEPL.

Optical lithography will be extended down to 65nm to 50 nm. However, a mask with high accurate CD uniformity and resolution enhancement technology (RET) such as optical proximity effect correction (OPC) and phase shifting mask (PSM) are required to achieve resolution by exposure wave length. The mask technology is the key of the optical lithography extension. We developed the electron beam mask writer EBM-3000 for 180-150nm design rule 1), 2), and EBM-3500 for 150-130nm design rule 3), to achieve high accuracy CD uniformity mask and small OPC pattern writing. They were variable shaped electron beam mask writing system with continuous moving stage, at 50kV acceleration voltage, and had the functions of multi-pass field shift writing, real-time proximity effect correction, grid matching correction, and automatic adjustment for election optical column.The LSI road map calls for such small minimum feature size as that so close to optical resolution limitation where increasingly complex optical proximity corrections (OPC) as well as extremely good mask CD uniformity are required. What is making the challenge even more difficult is that writing time is exponentially increasing as the shot number is exploding to primarily cope with the complex and voluminous OPC and extremely good CD uniformity requirements. Thus the newly developed electron beam mask lithography system EBM-4000 is designed to overcome all these difficult problems associated with 100nm as well as 70nm node masks. In order to increase throughput, triangle/rectangle beam optical column, high current density/high resolution lens, and high speed DAC amplifiers have been developed. To achieve accurate CD uniformity, foggy electron correction/loading effect correction functions are developed.

Chromeless phase lithography (CPL, or previously named CLM) is based on using 100 percent transmission PSM in the critical patterning area. However, unlike the conventional single chromeless phase edge type, CPL forms pattern images based on a pair of symmetrical phase-edges in proximity. In principle, the mask pattern layout is very similar to attenuated phase shift mask. There is no need to be concerned with neither phase assignment nor phase conflict. The mask layout complexity is greatly reduced as compared to the requirement for alternating PSM. In this report, we discuss how to optimize CPL mask design for a full-chip application. One effective method is by applying chrome patches or 'chrome shields' on top of the optically sensitive pattern areas. In 'large' 100 percent phase transmission areas, the chrome shield can prevent printing an undesirable pattern. As for the 'critical' pattern areas, chrome shields can be effectively used for controlling optical proximity effects in order to enhance the printing performance. We found chrome scattering bar (SB) OPC is necessary to improve process window. Using LithoCruiser simulation, we predict that it is possible to obtain manufacturable overlapped-process-window across a full range of feature pitch for 70nm line CD target with ArF exposure.

Mask critical dimension (CD) control relies on advanced write tools and resist processes. However, a specified write tool and process does not necessarily guarantee high mask quality. As the mask feature size shrinks to below 500 nm, there are other mask-related factors that can also significantly affect the mask performance. This paper discusses the impact of those non-trivial factors, such as mask writing tool and process control, calibration of mask CD metrology, blank quality of attenuated phase shift mask (ATPSM), pellicle degradation due to 193 nm laser irradiation, and profile of mask features, etc.